Process of manufacturing thin film transistor
A process of producing a thin film transistor includes forming a gate line on a substrate by first exposure and development processes. A source electrode, a drain electrode and a semiconductor channel are formed by second exposure and development processes. An island-shaped transistor is formed by third exposure and development processes. A protection layer with a contact hole therein is formed by fourth exposure and development processes. A pixel electrode is formed by fifth exposure and development processes to connect to the contact hole.
1. A process of producing a thin film transistor, comprising:
sequentially forming a first metal layer and a first photoresist on a substrate;
patterning the first photoresist by exposure and development processes using a first photomask, and forming a gate line on the substrate by etching, and removing the first photoresist after exposure;
sequentially forming an insulator layer, a semiconductor layer, an ohmic contact layer, a second metal layer and a second photoresist layer on a gate line;
patterning the second photoresist by exposure and development processes using a second photoresist, and forming a source and a drain on the ohmic contact layer alter etching to form a semiconductor channel between the source and the drain, and removing the second photoresist after exposure;
forming a third photoresist layer on the substrate, wherein the substrate includes the source, the drain, the semiconductor channel and the semiconductor layer;
patterning the third photoresist layer by exposure and development processes using a third photomask, and forming an island-shaped transistor region after etching and removing the third photoresist;
sequentially forming a protection layer and a fourth photoresist layer on the substrate with the island-shaped transistor region therein;
patterning the fourth photoresist layer by exposure and development processes using a fourth photomask, and defining a contact hole in the protection layer by etching, and removing the fourth photoresist layer;
sequentially forming a pixel electrode and a fifth photoresist layer on the protection layer; and
patterning a fifth photoresist by exposure and development processes using a fifth photomask, and forming a pixel electrode by etching that connects to the drain via the contact hole, and removing the fifth photoresist layer.
2. The process of claim 1 , wherein the first metal layer is made of a material selected from the group consisting of aluminum, chromium and molybdenum.
3. The process of claim 1 , wherein the second metal layer is made of a material selected from the group consisting of aluminum, chromium and molybdenum.
4. The process of claim 1 , wherein the protection layer is made of silicon nitride or silicon dioxide.
5. The process of claim 1 , wherein the pixel electrode is made of transparent indium-tin-oxide (ITO).
6. The process of claim 1 , wherein the channel is formed by back channel etching (BCE).
7. The process of claim 1 , wherein the first metal layer is formed on the substrate by dry or wet etching.
8. The process of claim 1 , wherein the channel is formed by dry etching the ohmic contact layer through the semiconductor layer.
9. The process of claim 1 . wherein the contact hole of the protection layer is formed by dry etching, the contact hole being exposed through the drain electrode.
10. The process of claim 1 , wherein the pixel electrode is formed by wet etching.
11. The process of claim 1 , wherein the semiconductor layer is made of amorphous silicon.
12. The process of claim 1 , wherein the ohmic contact layer is an N type heavily doped silicon layer.