IP Library Granted Patent US 7,060,597
Granted Patent B2
US 7,060,597 · App. 10/847,305 · Granted Jun 13, 2006

Manufacturing method for a silicon substrate having strained layer

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Quick Facts
Patent No.
US 7,060,597
App. No.
10/847,305
Granted
Jun 13, 2006
Kind
B2
Abstract

A manufacturing method for a silicon substrate having a strained layer, has steps of forming a plurality of atomic steps having a height of 0.1 nm or more on the surface of a silicon substrate, forming a plurality of terraces having a width of 0.1 μm or more between the plurality of atomic steps and forming a SiGe layer or a SiGe layer and a Si layer on the silicon substrate.

Claims (24)

1. A manufacturing method for a silicon substrate having a strained layer, comprising steps of:

forming a plurality of atomic steps having a height of 0.1 nm or more on the surface of a silicon substrate;

forming a plurality of terraces having a width of 0.1 μm or more between the plurality of atomic steps; and

forming a SiGe layer or a SiGe layer and a Si layer on the silicon substrate,

wherein the plurality of steps and plurality of terrace structures on the surface of the silicon substrate are formed at heat treatment, and

wherein a threading dislocation density on a surface of the SiGe layer or the SiGe layer and the Si layer is 10 4 /cm 2 or less.

2. A manufacturing method for a silicon substrate having a strained layer comprising steps of:

forming a plurality of protrusions made of crystalline silicon on a silicon substrate;

forming an SiGe layer or an SiGe layer and an Si layer on the silicon substrate; and

a step of cleaning with ozonized water and HF solution to form the crystalline silicon protrusions on the silicon substrate after subjecting the silicon substrate to hydrogen or Ar annealing at a high temperature.

3. A manufacturing method for a silicon substrate having a strained layer as set forth in claim 2 , wherein the protrusions of crystalline silicon have a height ranging from 0.2 nm to 1.0 nm, a width ranging from 10 nm to 150 nm and an in-plane density ranging from 1×10 19 to 5×10 10 /cm 2 .

4. A manufacturing method for a silicon substrate having a strained layer as set forth in claim 2 , further comprising a step of forming a strained layer after oxidizing the protruding portion of the crystalline silicon.

5. A manufacturing method for a silicon substrate having a strained layer as set forth in claim 6 , further comprising a step of forming a strain relaxation layer after allowing Ge to undergo epitaxial growth in island pattern at sites other than the protruding portion of the oxidized crystalline silicon.

6. A manufacturing method for a silicon substrate having a strained layer as set forth in claim 4 , further comprising a step of subjecting the silicon substrate to cleaning with ozonized water to oxidize the protruding portion of the crystalline silicon after subjecting the silicon substrate to cleaning with HF solution to remove the oxide layer.

7. A manufacturing method for a silicon substrate having a strained layer including a island-patterned silicon layer, a strain relaxation layer and a silicon layer having a lattice strain formed on a monocrystalline silicon substrate in this order, comprising steps of:

forming an island-patterned layer having a thickness ranging from 10 nm to 400 nm and a width ranging from 10 nm to 1,000 nm on a monocrystalline silicon substrate;

allowing a strain relaxation layer to undergo epitaxial growth on the island-patterned silicon layer to a thickness ranging from 10 nm to 200 nm; and

forming a strained silicon layer having lattice strain on the strain relaxation layer to a thickness ranging from 10 nm to 50 nm,

wherein a threading dislocation density on a surface of the SiGe layer or the SiGe layer and the Si layer is 10 4 /cm 2 or less.

8. A manufacturing method for a silicon substrate having a strained layer as set forth in claim 7 , wherein the island-patterned silicon layers are formed at an interval ranging from 100 nm to 1,000 nm.

9. A manufacturing method for a silicon substrate having a strained layer as set forth in claim 7 , wherein the strain relaxation layer is a layer obtained by allowing silicon-germanium to undergo epitaxial growth.

10. A manufacturing method for a silicon substrate having a strained layer as set forth in claim 7 , wherein a step of forming a thin oxide layer having a thickness of 10 nm or less on the monocrystalline silicon substrate is provided before the step of forming the island-patterned silicon layer on the monocrystalline silicon substrate.

11. A manufacturing method for a silicon substrate having a strained layer as set forth in claim 7 , wherein the strain relaxation layer has a thickness ranging from 50 nm to 150 nm.

12. A manufacturing method for a silicon substrate having a strained layer as set forth in claim 9 , wherein the atomic concentration ratio of germanium in silicon-germanium in the strain relaxation layer is from 0.5 to 0.7.

Assignments (2)
MERGER Recorded Sep 13, 2007
From: TOSHIBA CERAMICS CO., LTD.
To: COVALENT MATERIALS CORPORATION
Reel/Frame 019817/0749 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 18, 2004
From: KURITA, HISATSUGU; IGARASHI, MASATO; SENDA, TAKESHI; IZUNOME, KOJI
To: TOSHIBA CERAMICS CO., LTD.
Reel/Frame 015345/0123 →