SOI wafer and process for producing it
View Patent ↗An SOI wafer, includes a substrate made from silicon, an electrically insulating layer with a thermal conductivity of at least 1.6 W/(Km) and a single-crystal silicon layer with a thickness of from 10 nm to 10 μm, a standard deviation of at most 5% from the mean layer thickness and a density of at most 0.5 HF defects/cm 2 . A process is for producing an SOI wafer of this type, in which a substrate wafer made from silicon is joined to a donor wafer via a layer of the electrically insulating material which has previously been applied. The donor wafer bears a donor layer of single-crystal silicon, with a concentration of vacancies of at most 10 12 /cm 3 and of vacancy agglomerates of at most 10 5 /cm 3 . After the wafers have been joined, the thickness of the donor wafer is reduced in such a manner that the single-crystal silicon layer having these properties is formed from the donor layer, this single-crystal silicon layer being joined to the substrate wafer via the layer of electrically insulating material.
1. An SOI wafer, comprising
a substrate made from silicon,
at least one continuous electrically insulating layer with a thermal conductivity of at least 1.6 W/(Km) in at least one spatial direction above at least one surface of the substrate, and
a single-crystal silicon layer with a thickness in the range from 10 nm to 10 μm, a standard deviation of at most 5% from the mean layer thickness and a density of at most 0.5 HF defects/cm 2 over the electrically insulating layer.
2. The SOI wafer as claimed in claim 1 , which has a density of at most 1·10 4 Secco defects/cm 2 .
3. The SOI wafer as claimed in claim 1 , wherein the electrically insulating layer has a thermal conductivity of at least 9 W/(Km).
4. The SOI wafer as claimed in claim 1 , wherein the electrically insulating layer has a thermal conductivity of at least 100 W/(Km).
5. The SOI wafer as claimed in claim 1 , wherein the electrically insulating layer comprises at least two layers of different electrically insulating materials.
6. An SOI wafer of claim 1 , wherein a single electrically insulating layer covers the entire single-crystal silicon layer.
7. An SOI wafer, comprising
a substrate made from silicon,
one or more continuous electrically insulating layers, at least one layer having a thermal conductivity of at least 1.6 W/(Km) in at least one spatial direction above at least one surface of the substrate, and
a single-crystal silicon layer with a thickness in the range from 10 nm to 10 μm, a standard deviation of at most 5% from the mean layer thickness and a density of at most 0.5 HF defects/cm 2 , over the electrically insulating layer, wherein said SOI wafer is produced by a process comprising
providing a substrate wafer made from silicon,
providing a donor wafer with a surface donor layer of single-crystal silicon, the thickness of which corresponds to at least a final thickness of the silicon layer to be produced therefrom and which has a concentration of vacancies of at most 10 12 /cm 3 and of vacancy agglomerates of at most 10 5 /cm 3 ,
applying a layer of an electrically insulating material with a thermal conductivity of at least 1.6 W/(Km) in at least one spatial direction to one side of the substrate wafer, to that side of the donor wafer which bears the donor layer, or to both said one side of the substrate wafer and to said side of the donor wafer which bears the donor layer, then
joining of the substrate wafer and the donor wafer, in such a manner that the side of the donor wafer which bears the donor layer is joined to the substrate wafer via the electrically insulating layer(s), and then
reducing the thickness of the donor wafer, so that a single-silicon layer with a final thickness in the range from 10 nm to 10 μm, a standard deviation of at most 5% from the mean layer thickness and a density of at most 0.5 HF defects/cm 2 formed from the donor layer, this single-crystal silicon layer being joined to the substrate wafer via the layer of electrically insulating material.
8. The SOI wafer as claimed in claim 7 , which has a density of at most 1·10 4 Secco defects/cm 2 .
9. The SOI wafer as claimed in claim 7 , wherein the electrically insulating layer has a thermal conductivity of at least 9 W/(Km).
10. The SOI wafer as claimed in claim 7 , wherein the electrically insulating layer has a thermal conductivity of at least 100 W/(Km).
11. The SOI wafer as claimed in claim 7 , wherein the electrically insulating layer comprises at least two layers of different electrically insulating materials.