Hardware initialization with or without processor intervention
View Patent ↗In an embodiment, an initialization extension device may provide an extended initialization period to enable a processor to configure a device, for example, an application specific integrated circuit (ASIC), prior to entering an operating mode. The device may include a number of control registers that may be configured to default settings in a register initialization period commenced in response to a reset signal. The reset signal may also trigger an extension timer to countdown a timer extended initialization period. During the timer extended initialization period, the processor may write an extension control signal, e.g., an extension bit, to a register. An initialization extension unit may maintain the device in an initialization mode during the timer extended initialization period and/or while the register contains the extension control signal. The processor may configure the control registers for one or more operations the device may perform when it enters the operating mode.
1. A method for initializing a device, comprising:
performing a first configuration operation in a first initialization period;
providing a second initialization period to enable a second configuration operation, said second initialization period ending after said first initialization period; and
commencing a third initialization period in response to an extension signal, said third initialization period ending after the second initialization period.
2. The method of claim 1 , wherein the device comprises an application specific integrated circuit (ASIC).
3. The method of claim 1 , wherein the device comprises a plurality of control registers.
4. The method of claim 3 , wherein said performing the first configuration operation comprises storing a plurality of default values in said plurality of control registers.
5. The method of claim 1 , further comprising:
transmitting a first signal, wherein the first configuration operation is performed in response to the first signal.
6. The method of claim 5 , further comprising:
commencing the second initialization period in response to the first signal.
7. The method of claim 5 , wherein the first signal is a reset signal.
8. The method of claim 1 , further comprising:
performing the second configuration operation in the third initialization period.
9. The method of claim 1 , further comprising:
ending the third initialization period in response to a termination signal.
10. A system comprising:
a processor;
a signal generator to generate a reset signal;
a device coupled to the processor and the signal generator, said device including:
a plurality of control registers;
a register initialization controller to configure the plurality of control registers during a register initialization period in response to the reset signal; and
an initialization extension unit to enable the processor to configure the plurality of control registers in an extended initialization period that ends after of the register initialization period;
an extension timer to countdown the extended initialization period in response to the reset signal and output a first extension signal during the extended initialization period; and
an extension register to output a second extension signal in response to an extension control signal from the processor;
wherein the initialization extension unit is operative to maintain the device in an initialization mode in response to at least one of the first extension signal and the second extension signal.
11. The system of claim 10 , wherein the device comprises an application specific integrated circuit (ASIC).
12. An apparatus, including instructions residing on a machine-readable medium, for initializing a device, the instructions causing the machine to:
perform a first configuration operation in a first initialization period;
provide a second initialization period to enable a second configuration operation, said second initialization period ending after said first initialization period; and
commence a third initialization period in response to an extension signal, said third initialization period ending after the second initialization period.
13. The apparatus of claim 12 , further comprising instructions that cause the machine to:
transmit a first signal, wherein the first configuration operation is performed in response to the first signal.
14. The apparatus of claim 13 , further comprising instructions that cause the machine to:
commence the second initialization period in response to the first signal.