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App. No. 10/861,450 · Confirmation No. 1042

Process for manufacturing a semiconductor wafer, a semiconductor wafer, process for manufacturing a semiconductor integrated circuit device, and semiconductor integrated circuit device

Abandoned -- Failure to Respond to an Office Action View Publication ↗
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2006-03-09 ABN Abandonment 2 View
2005-06-23 CTNF Non-Final Rejection 5 View
2005-06-23 1449 List of References cited by applicant and considered by examiner 3 View
2005-06-23 892 List of references cited by examiner 1 View
2005-06-23 SRFW Search information including classification, databases and other search related notes 1 View
2005-06-23 FWCLM Index of Claims 1 View
2005-06-20 SRNT Examiner's search strategy and results 1 View
2004-09-13 WFEE Fee Worksheet (SB06) 1 View
2004-09-13 FWCLM Index of Claims 1 View
2004-06-07 TRNA Transmittal of New Application 2 View
2004-06-07 SPEC Specification 75 View
2004-06-07 CLM Claims 7 View
2004-06-07 ABST Abstract 1 View
2004-06-07 DRW Drawings-only black and white line drawings 19 View
2004-06-07 OATH Oath or Declaration filed 2 View
2004-06-07 A.PE Preliminary Amendment 1 View
2004-06-07 SPEC Specification 1 View
2004-06-07 REM Applicant Arguments/Remarks Made in an Amendment 2 View
2004-06-07 IDS Information Disclosure Statement (IDS) Form (SB08) 5 View
2004-06-07 FRPR Certified Copy of Foreign Priority Application 1 View
2004-06-07 WFEE Fee Worksheet (SB06) 1 View
2004-06-07 WFEE Fee Worksheet (SB06) 1 View
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Quick Facts
App. No.
10/861,450
Filed
2004-06-07
Pub. No.
US20040219727A1
Examiner
VU, DAVID
Art Unit
2818