Inverting zipper repeater circuit
View Patent ↗Repeater circuits including an inverting zipper repeater circuit and an inverting gain-enhanced repeater circuit are described.
1. An inverting zipper repeater circuit comprising:
a holding subcircuit coupled to receive an input signal and coupled to an output terminal;
a delay chain of inverters coupled to receive said input signal;
a first pulse generator comprising said delay chain inverters coupled to receive said input signal and for generating a rising output transition at said output terminal;
a first latching circuit coupled an output node of said first pulse generator and to said output terminal, wherein said first pulse generator further comprises:
a NOR gate with input nodes coupled to receive a signal from said delay chain of inverters and said input signal; and
an NFET coupled to an output node of said NOR gate, said NFET coupled to said first latching circuit;
a second pulse generator comprising said delay chain of inverters coupled to receive said input signal and for generating a falling output transition at said output terminal; and
a second latching circuit coupled an output node of said second pulse generator and to said output terminal.
2. The inverting zipper repeater circuit of claim 1 , wherein said first pulse generator is responsive to a falling edge of said input signal.
3. The inverting zipper repeater circuit of claim 1 , wherein said second pulse generator is responsive to a rising edge of said input signal.
4. The inverting zipper repeater circuit of claim 1 , wherein said latching circuit comprises:
a precharge circuit coupled to said output node of said first pulse generator; and
a half latch circuit coupled to said first output node.
5. The inverting zipper repeater circuit of claim 1 , wherein said second pulse generator further comprises:
a NAND gate with input nodes coupled to receive a signal from said delay chain of inverters and said input signal;
a PFET coupled to an output node of said NAND gate, said PFET coupled to said second latching circuit.
6. The inverting zipper repeater circuit of claim 5 , wherein said latching circuit comprises:
a precharge circuit coupled to said output node of said second pulse generator; and
a half latch circuit coupled to said second output node.