Semiconductor integrated circuit device
View Patent ↗A semiconductor integrated circuit device has a pair of oscillator terminals that is respectively provided with two oscillation signals having phases opposite to each other. An oscillator circuit provides an internal circuit with a system clock signal based on the oscillation signals. A mode detection circuit detects that the pair of oscillator terminals is respectively provided with two input signals having the same phase, and provides a test circuit with a detection signal. The test circuit sets a test mode according to the detection signal, and provides the internal circuit with a predetermined test signal. By setting the test mode using a pair of external terminals, an increase in the number of external terminals of the semiconductor integrated circuit device can be prevented.
1. A semiconductor integrated circuit device that operates in a first mode based on first and second signals having phases opposite to each other, the semiconductor integrated circuit device comprising:
a pair of external terminals that is provided with the first and second signals respectively; and
a detection circuit for generating a detection signal that causes the semiconductor integrated circuit device to operate in a second mode different from the first mode when the pair of external terminals is provided with a third and fourth signals having the same phase respectively.
2. The semiconductor integrated circuit device of claim 1 , wherein the first mode is a normal operation mode and the second mode is a test mode.
3. The semiconductor integrated circuit device of claim 1 , wherein the detection circuit includes a comparator for detecting a signal level of each of the third and fourth signals and generating the detection signal.
4. The semiconductor integrated circuit device of claim 1 , wherein the detection circuit includes:
a logical circuit for generating a pulse signal using the third and fourth signals;
a filter, connected to the logical circuit, for smoothing the pulse signal to generate a smooth signal; and
a comparator, connected to the filter, for detecting a signal level of the smooth signal and generating the detection signal.
5. The semiconductor integrated circuit device of claim 1 , further comprising:
a test circuit, connected to the detection circuit, for measuring an output period during which the detection signal is being output from the detection circuit, and selecting one of a plurality of second modes based on a result of the measurement.
6. The semiconductor integrated circuit device of claim 1 , further comprising:
a period determination circuit, connected to the detection circuit, for measuring a predetermined period, and supplying power to the detection circuit until the predetermined period elapses.
7. The semiconductor integrated circuit device of claim 6 , further comprising:
a register, connected to the period determination circuit, for setting the predetermined period.
8. The semiconductor integrated circuit device of claim 1 , wherein the pair of external terminals is one of a plurality of pairs of external terminals, and the detection circuit is one of a plurality of detection circuits corresponding to the plurality of pairs of external terminals.