IP Library Granted Patent US 7,613,615
Granted Patent B1
US 7,613,615 · App. 10/871,287 · Granted Nov 3, 2009

Circuits, systems, and methods for real-time de-shuffling of shuffled audio data

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Quick Facts
Patent No.
US 7,613,615
App. No.
10/871,287
Granted
Nov 3, 2009
Kind
B1
Abstract

A data de-shuffler includes a buffer having a set of addressable locations for storing data and control circuitry for de-shuffling a sequence of shuffled data samples. The control circuitry stores a first data sample of the sequence of shuffled data samples at a first location in the buffer with a first address generated from an entry in a look up table and stores a second data sample at a second location in the buffer with a second address generated by incrementing from the first address by a selected incrementation value. The first and second locations in the buffer place the first and second samples in corresponding positions in an un-shuffled sequence of samples.

Claims (17)

1. An audio system comprising:

input circuitry for inputting a stream of audio data shuffled in accordance with a selected shuffling algorithm;

a de-shuffler for de-shuffling the stream of audio samples, the de-shuffler operable to:

store a first audio sample of each data sync block of each track of an audio block in a buffer location corresponding to an address generated from a look-up table; and

store each remaining audio sample of each data sync block of each track of the audio block in a buffer location corresponding to an address generated by incrementing by an incrementation value from a base address provided by the address generated from the look-up table, wherein the incrementation value is selected according to the selected shuffling algorithm;

a memory for storing a sequence of de-shuffled audio samples of an audio block output from the buffer locations, wherein the memory stores two copies of the de-shuffled audio samples output from the buffer locations;

processing circuitry for compressing one of the two copies of the audio samples stored in memory; and

loop-back circuitry for playing-back another one of the two copies of the audio samples stored in memory.

2. The audio system of claim 1 , wherein the buffer locations are disposed in a selected one of set of alternating buffers, the selected one of the buffers storing audio samples being deshuffled by the de-shuffler and a second one of the buffers concurrently providing de-shuffled audio samples to the memory.

3. The audio system of claim 1 , wherein the processing circuitry compresses the one of the two copies of the audio samples into a selected one of MPEG and AC3 compression formats.

4. The audio system of claim 1 , wherein the look-up table is selected from a set of look-up tables for respectively de-shuffling NTSC and PAL format audio samples and the incrementation value is selected from a set of constants for respectively de-shuffling NTSC and PAL format audio samples.

5. The audio system of claim 4 , wherein the audio system is fabricated on a single integrated circuit chip.

6. The audio system of claim 1 , wherein the stream of shuffled data samples comprises a stream of data samples each associated with an audio sync block, a track number, and an audio block in accordance with the digital video (DV) standard.

7. The audio system of claim 6 ; wherein each sample comprises two bytes of data encoded in a selected one of the 48 k, 44.1 k, and 32 k modes in accordance with the digital video (DV) standard.

8. The audio system of claim 6 , wherein each sample-pair comprises two twelve-bit samples of data encoded in the 32 k 2ch mode in accordance with the digital video (DV) standard.

9. The audio system of claim 6 , wherein the first sample of the stream of shuffled data comprises a first sample in a corresponding audio sync block and the second sample of the stream of shuffled data comprises another sample in the audio sync block.

10. The audio system of claim 6 , wherein the stream of shuffled data is formatted in accordance with a selected one of NTSC and PAL audio formats in accordance with the digital video (DV) standard.

Assignments (13)
RELEASE OF SECURITY INTEREST Recorded Mar 29, 2019
From: JPMORGAN CHASE BANK, N.A.
To: INTEGRATED DEVICE TECHNOLOGY, INC.; GIGPEAK, INC.; CHIPX, INCORPORATED; ENDWAVE CORPORATION; MAGNUM SEMICONDUCTOR, INC.
Reel/Frame 048746/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 4, 2017
From: MAGNUM SEMICONDUCTOR, INC.
To: INTEGRATED DEVICE TECHNOLOGY, INC.
Reel/Frame 043207/0637 →
RELEASE OF SECURITY INTEREST Recorded Apr 5, 2017
From: SILICON VALLEY BANK
To: MAGNUM SEMICONDUCTOR, INC.
Reel/Frame 042166/0405 →
SECURITY AGREEMENT Recorded Apr 5, 2017
From: INTEGRATED DEVICE TECHNOLOGY, INC.; GIGPEAK, INC.; MAGNUM SEMICONDUCTOR, INC.; ENDWAVE CORPORATION; CHIPX, INCORPORATED
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 042166/0431 →
RELEASE OF SECURITY INTEREST Recorded Apr 15, 2016
From: CAPITAL IP INVESTMENT PARTNERS LLC
To: MAGNUM SEMICONDUCTOR, INC.
Reel/Frame 038440/0565 →
SECURITY AGREEMENT Recorded Apr 6, 2016
From: MAGNUM SEMICONDUCTOR, INC.
To: SILICON VALLEY BANK
Reel/Frame 038366/0098 →
SHORT-FORM PATENT SECURITY AGREEMENT Recorded Oct 31, 2014
From: MAGNUM SEMICONDUCTOR, INC.
To: CAPITAL IP INVESTMENT PARTNERS LLC, AS ADMINISTRATIVE AGENT
Reel/Frame 034114/0102 →
RELEASE OF SECURITY INTEREST Recorded Apr 29, 2013
From: SILICON VALLEY BANK , AS AGENT FOR THE BENEFIT OF THE LENDERS
To: MAGNUM SEMICONDUCTOR, INC.
Reel/Frame 030310/0985 →
RELEASE OF SECURITY INTEREST Recorded Apr 29, 2013
From: SILICON VALLEY BANK
To: MAGNUM SEMICONDUCTOR, INC.
Reel/Frame 030310/0764 →
SECURITY AGREEMENT Recorded Jun 13, 2006
From: MAGNUM SEMICONDUCTOR, INC.
To: SILICON VALLEY BANK AS AGENT FOR THE BENEFIT OF THE LENDERS
Reel/Frame 017766/0605 →
SECURITY AGREEMENT Recorded Jun 12, 2006
From: MAGNUM SEMICONDUCTOR, INC.
To: SILICON VALLEY BANK
Reel/Frame 017766/0005 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 2, 2006
From: CIRRUS LOGIC, INC.
To: MAGNUM SEMICONDUCTOR, INC.
Reel/Frame 017523/0448 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 17, 2004
From: MAHMOOD, AKHTAR; CHEN, CHENG-TIE; CHEN, TING-CHUNG
To: CIRRUS LOGIC, INC.
Reel/Frame 015497/0907 →