IP Library Granted Patent US 7,019,546
Granted Patent B1
US 7,019,546 · App. 10/877,480 · Granted Mar 28, 2006

Test head for integrated circuit tester

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Quick Facts
Patent No.
US 7,019,546
App. No.
10/877,480
Granted
Mar 28, 2006
Kind
B1
Abstract

A test head for a semiconductor integrated circuit tester includes first and second card cages and first and second groups of interface connectors for engagement by DUT edges of pin electronics cards installed in the first and second card cages respectively. The interface connectors of the first group are inclined at an angle less than 180° to the interface connectors of the second group.

Claims (23)

1. A test head for a semiconductor integrated circuit tester, the test head comprising:

first and second card cages, and

first and second groups of interface connectors for engagement by DUT edges of pin electronics cards installed in the first and second card cages respectively,

and wherein the interface connectors of the first group are inclined at an angle less than 180° to the interface connectors of the second group.

2. A test head according to claim 1 , wherein each interface connector has a tester side for engaging a pin electronics card and a DUT side opposite the tester side, and the test head further comprises a device interface board having tester side terminals that are connected to the terminals of the pin electronics cards and also having device side terminals for connection to a device under test.

3. A test head according to claim 1 , wherein the interface connectors of the first group are inclined at an obtuse angle to the interface connectors of the second group.

4. A test head according to claim 3 , wherein the interface connectors of the first group are inclined at an angle in the range from 120° to 175° to the interface connectors of the second group.

5. A test head according to claim 1 , wherein the interface connectors of the first group are inclined at an angle in the range from 60° to 175° to the interface connectors of the second group.

6. A test head according to claim 1 , wherein the first and second card cages have first and second bottom walls respectively, the first and second bottom walls are inclined to each other at said angle less than 180°, and the interface connectors of the first and second groups are mounted in the first and second bottom walls respectively.

7. A test head for an integrated circuit tester, the test head comprising:

first and second card cages, and

first and second groups of pin electronics cards located in the first and second card cages respectively, each pin electronics card having a DUT edge and an opposite tester edge,

and wherein the DUT edges of the first group of pin electronics cards are inclined at an angle less than 180° to the DUT edges of the second group of pin electronics cards.

8. A test head according to claim 7 , wherein each pin electronics cards is provided at its DUT edge with terminals for connection to a device under test and the test head further comprises a device interface board having tester side terminals that are connected to the terminals of the pin electronics cards and also having device side terminals for connection to a device under test.

9. A test head according to claim 7 , wherein the first and second card cages have first and second bottom walls respectively, the first and second bottom walls are inclined to each other at said angle less than 180°, the test head further comprises first and second groups of interface connectors for engagement by DUT edges of pin electronics cards installed in the first and second card cages respectively, and the interface connectors of the first and second groups are mounted in the first and second bottom walls respectively.

10. A test head for an integrated circuit tester, the test head comprising:

first and second card cages, each card cage having first and second opposite walls, wherein the first and second walls of the first cage are parallel to each other, the first and second walls of the second cage are parallel to each other, the first and second walls of each card cage are formed with guides for receiving pin electronics cards, the first wall of the first card cage is nearer than the second wall of the first card cage to the second card cage, the first wall of the second card cage is nearer than the second wall of the second card cage to the first card cage, and the first wall of the first card cage and the first wall of the second card cage are mutually inclined at an acute angle.

11. A test head according to claim 10 , wherein the first and second card cages each have an opening for insertion of pin electronics cards into the card cage in a direction along an insertion axis, the test head further comprises first and second groups of interface connectors for engagement by DUT edges of pin electronics cards installed in the first and second card cages respectively, and the first wall of the first card cage and the first wall of the second card cage converge towards a device location.

12. A test head according to claim 10 , comprising first and second groups of pin electronics cards located in the first and second card cages respectfully, each pin electronics card having a DUT edge and an opposite tester edge in engagement with first and second groups of interface connectors respectively, and a DUT board having tester side terminals that are connected to the terminals of the interface connectors and also having device side terminals for connection to a device under test, wherein the DUT board is substantially perpendicular to a plane that bisects the angle between the first wall of the first card cage and the first wall of the second card cage.

13. A test head according to claim 10 , wherein the first wall of each card cage is perforated, the first wall of the first card cage and the first wall of the second card cage define an air collection plenum therebetween and the test head further comprises a baffle wall joining the first wall of the first card cage and the first wall of the second card cage and at least one fan mounted in the baffle wall for inducing a flow of air into the air collection plenum by way of the first wall of the first card cage and the first wall of the second card cage.

14. A test head according to claim 13 , comprising first and second rows of fans mounted in the baffle wall, wherein the first and second card cages are mounted in a casing, and the test head further comprises a duct structure between the baffle wall and the casing for directing air flow from the fans to respective ports in the casing.

15. A test head according to claim 14 , wherein the first card cage has a cover that is pivotally mounted relative to the walls of the card cage, the duct structure includes a plurality of duct members for directing air flow from the fans respectively toward respective air outlet ports of the casing, and the cover includes a backplane structure, a plurality of connector members attached to the backplane structure for engaging complementary connector members attached to pin electronics cards in the first card cage and cables that are connected to the backplane structure are threaded between the duct members of the duct structure.

16. A test head according to claim 15 , comprising two opposite end walls, wherein the first and second walls of the first card cage are located between and are perpendicular to the two end walls, the cover is mounted for pivotal movement about an axis perpendicular to the end walls, and the cables pass through an opening in at least one end wall.

Assignments (5)
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT PATENT NUMBER 7261561 AND REPLACE WITH PATENT NUMBER 7231561 PREVIOUSLY RECORDED ON REEL 034660 FRAME 0188. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT. Recorded Feb 11, 2016
From: XCERRA CORPORATION; EVERETT CHARLES TECHNOLOGIES LLC
To: SILICON VALLEY BANK, AS ADMINISTRATIVE AGENT
Reel/Frame 037824/0372 →
SECURITY AGREEMENT Recorded Dec 18, 2014
From: XCERRA CORPORATION; EVERETT CHARLES TECHNOLOGIES LLC
To: SILICON VALLEY BANK, AS ADMINISTRATIVE AGENT
Reel/Frame 034660/0188 →
RELEASE OF SECURITY INTEREST IN UNITED STATES PATENTS Recorded Dec 18, 2014
From: SILICON VALLEY BANK, AS ADMINISTRATIVE AGENT
To: XCERRA CORPORATION; EVERETT CHARLES TECHNOLOGIES LLC
Reel/Frame 034660/0394 →
CHANGE OF NAME Recorded May 27, 2014
From: LTX-CREDENCE CORPORATION
To: XCERRA CORPORATION
Reel/Frame 033032/0768 →
SECURITY AGREEMENT Recorded Jan 17, 2014
From: LTX-CREDENCE CORPORATION; EVERETT CHARLES TECHNOLOGIES LLC
To: SILICON VALLEY BANK, AS ADMINISTRATIVE AGENT
Reel/Frame 032086/0476 →