IP Library Granted Patent US 7,764,709
Granted Patent B2
US 7,764,709 · App. 10/885,821 · Granted Jul 27, 2010

Prioritization of network traffic

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Quick Facts
Patent No.
US 7,764,709
App. No.
10/885,821
Granted
Jul 27, 2010
Kind
B2
Abstract

A plurality of packets associated with a plurality of protocols are received, wherein the plurality of packets are to be processed by a plurality of processors. Packets associated with a first protocol are sent to be processed by at least one of the plurality of processors before sending packets associated with a second protocol to be processed, in response to determining that the packets associated with the first protocol have a higher priority for processing than the packets associated with the first protocol.

Claims (55)

1. A method, comprising:

receiving a plurality of packets associated with a plurality of protocols, wherein the plurality of packets are to be processed by a plurality of processors;

sending packets associated with a first protocol to be processed by at least one of the plurality of processors before sending packets associated with a second protocol to be processed, in response to determining that the packets associated with the first protocol have a higher priority for processing than the packets associated with the second protocol;

determining a least loaded processor among the plurality of processors, wherein determining the least loaded processor includes tracking load statistics on the plurality of processors by a device driver and a plurality of deferred procedure call management objects, and determining from the load statistics the least loaded processor; and

reassigning at least one packet of the packets associated with the first protocol to the least loaded processor, wherein reassigning the at least one packet further comprises retargeting a deferred procedure call management object corresponding to the packets associated with the first protocol to the least loaded processor.

2. The method of claim 1 , wherein the first protocol is a storage area networking protocol, wherein the second protocol is a local area networking protocol.

3. The method of claim 1 , wherein sending the packets further comprises:

maintaining, in a device driver, interrupt management entries with corresponding deferred procedure call management objects that map to the plurality of processors;

reading an interrupt cause register in a network interface hardware, in response to an interrupt service routine in the device driver of the network interface hardware being called; and

scheduling selected deferred procedure call management objects corresponding to selected interrupt management entries indicated by the interrupt cause register, wherein the selected deferred procedure call management objects are capable of processing the plurality of packets in the plurality of processors.

4. The method of claim 1 , wherein the plurality of packets are received by a network interface hardware having a plurality of ports and a plurality of channels, wherein a port is associated with at least one channel, wherein a channel is used for communicating packets of one protocol to a host to which the network interface hardware is coupled, and wherein a single interrupt line couples the network interface hardware to the host.

5. The method of claim 1 , wherein receiving is performed by a network interface hardware coupled to a host, wherein sending the packets is performed by a device driver implemented in the host, and wherein the device driver utilizes the plurality of processors while maintaining different processing priorities for the plurality of packets associated with the plurality of protocols.

6. A system, comprising:

a plurality of processors;

a network interface hardware coupled to the plurality of processors;

a device driver coupled to the plurality of processors; and

a computer-readable storage medium coupled to the plurality of processors, wherein program logic including code is implemented in the computer-readable storage medium, and wherein the program logic including code causes the plurality of processors to be operable to

receive a plurality of packets associated with a plurality of protocols, wherein the plurality of packets are to be processed by the plurality of processors,

send packets associated with a first protocol to be processed by at least one of the plurality of processors before packets associated with a second protocol to be processed are sent, in response to a determination that the packets associated with the first protocol have a higher priority for processing than the packets associated with the second protocol,

determine a least loaded processor among the plurality of processors, wherein determining a least loaded processor includes tracking load statistics on the plurality of processors by the device driver and a plurality of deferred procedure call management objects associated with the device driver and determining from the load statistics the least loaded processor, and

reassign at least one packet of the packets associated with the first protocol to the least loaded processor, wherein the program logic including code further causes the plurality of processors to be operable to retarget a deferred procedure call management object corresponding to the packets associated with the first protocol to the least loaded processor.

7. The system of claim 6 , wherein the first protocol is a storage area networking protocol, wherein the second protocol is a local area networking protocol.

8. The system of claim 6 , further comprising:

a device driver of the network interface hardware, wherein the program logic including code further causes the plurality of processors to be operable to:

maintain, in the device driver, interrupt management entries with corresponding deferred procedure call management objects that map to the plurality of processors;

read an interrupt cause register in the network interface hardware, in response to an interrupt service routine in the device driver of the network interface hardware being called; and

schedule selected deferred procedure call management objects corresponding to selected interrupt management entries indicated by the interrupt cause register, wherein the selected deferred procedure call management objects are capable of processing the plurality of packets in the plurality of processors.

9. The system of claim 6 , wherein the plurality of packets are received by the network interface hardware having a plurality of ports and a plurality of channels, wherein a port is associated with at least one channel, wherein a channel is capable of being used to communicate packets of one protocol to the plurality of processors to which the network interface hardware is coupled, and wherein a single interrupt line couples the network interface hardware to the plurality of processors.

10. The system of claim 6 , wherein the network interface hardware is capable of being configured to receive the packets, wherein a device driver of the network interface hardware is capable of being configured to send the packets, and wherein the device driver is capable of being configured to utilize the plurality of processors while maintaining different processing priorities for the plurality of packets associated with the plurality of protocols.

11. A system, comprising:

a host;

a storage controller implemented in the host;

a plurality of processors coupled to the host;

a network interface hardware coupled to host; and

a computer-readable storage medium coupled to the plurality of processors, wherein program logic including code is implemented in the computer-readable storage medium, and wherein the program logic including code causes the plurality of processors to be operable to:

receive a plurality of packets associated with a plurality of protocols, wherein the plurality of packets are to be processed by the plurality of processors; and

send packets associated with a first protocol to be processed by at least one of the plurality of processors before packets associated with a second protocol to be processed are sent, in response to a determination that the packets associated with the first protocol have a higher priority for processing than the packets associated with the second protocol, wherein the program logic including code further causes the plurality of processors to be operable to:

(i) determine a least loaded processor among the plurality of processors; and

(ii) reassign at least one packet of the packets associated with the first protocol to the least loaded processor, the system further comprising a device driver implemented in the host, wherein the program logic including code further causes the plurality of processors to be operable to:

(a) maintain, in the device driver, interrupt management entries with corresponding-deferred procedure call management objects that map to the plurality of processors;

(b) read an interrupt cause register in the network interface hardware, in response to an interrupt service routine in the device driver of the network interface hardware being called; and

(c) schedule selected deferred procedure call management objects corresponding to selected interrupt management entries indicated by the interrupt cause register, wherein the selected deferred procedure call management objects are capable of processing the plurality of packets in the plurality of processors.

12. The system of claim 11 , wherein the plurality of packets are received by the network interface hardware having a plurality of ports and a plurality of channels, wherein a port is associated with at least one channel, wherein a channel is capable of being used for communicating packets of one protocol to the host to which the network interface hardware is coupled, and wherein a single interrupt line couples the network interface hardware to the host.

13. A non-transitory computer readable-storage medium encoded with computer executable instructions, wherein the computer executable instructions are executed to:

receive a plurality of packets associated with a plurality of protocols, wherein the plurality of packets are to be processed by a plurality of processors;

send packets associated with a first protocol to be processed by at least one of the plurality of processors before packets associated with a second protocol to be processed are sent, in response to a determination that the packets associated with the first protocol have a higher priority for processing than the packets associated with the second protocol;

determine a least loaded processor among the plurality of processors, wherein determining the least loaded processor includes tracking load statistics on the plurality of processors by a device driver and a plurality of deferred procedure call management objects, and determining from the load statistics the least loaded processor; and

reassign at least one packet of the packets associated with the first protocol to the least loaded processor, wherein the computer readable instructions are executed further to retarget a deferred procedure call management object corresponding to the packets associated with the first protocol to the least loaded processor.

14. The non-transitory computer-readable storage medium of claim 13 , wherein the first protocol is a storage area networking protocol, wherein the second protocol is a local area networking protocol.

15. The non-transitory computer-readable storage medium of claim 13 , wherein the instructions are further capable of being executed to:

maintain, in a device driver, interrupt management entries with corresponding deferred procedure call management objects that map to the plurality of processors;

read an interrupt cause register in a network interface hardware, in response to an interrupt service routine in the device driver of the network interface hardware being called; and

schedule selected deferred procedure call management objects corresponding to selected interrupt management entries indicated by the interrupt cause register, wherein the selected deferred procedure call management objects are capable of processing the plurality of packets in the plurality of processors.

16. The non-transitory computer-readable storage medium of claim 13 , wherein the plurality of packets are received by a network interface hardware having a plurality of ports and a plurality of channels, wherein a port is associated with at least one channel, wherein a channel is capable of being used for communicating packets of one protocol to a host to which the network interface hardware is coupled, and wherein a single interrupt line couples the network interface hardware to the host.

17. The non-transitory computer-readable storage medium of claim 13 , wherein a network interface hardware coupled to a host is capable of being configured to receive the packets, wherein a device driver implemented in the host is capable of being configured to send the packets, and wherein the device driver is capable of being configured to utilize the plurality of processors while maintaining different processing priorities for the plurality of packets associated with the plurality of protocols.

Assignments (10)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050937/0001 →
RELEASE OF SECURITY INTEREST Recorded Aug 23, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 047243/0001 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Jun 8, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 043079/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 2, 2016
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 038954/0001 →
SECURITY INTEREST Recorded May 12, 2016
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038669/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2012
From: NUMONYX B.V.
To: MICRON TECHNOLOGY, INC.
Reel/Frame 027632/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 11, 2012
From: INTEL CORPORATION
To: NUMONYX B.V.
Reel/Frame 027545/0314 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 25, 2004
From: TRAN, HICU T.; KUMAR, DINESH; PATIL, KIRAN A.; CORNETT, LINDEN
To: INTEL CORPORATION
Reel/Frame 015290/0343 →