Semiconductor device
View Patent ↗A transistor region is a region where a plurality of MOS transistors, including an MOS transistor, are formed, and a dummy region is a region lying under a spiral inductor. In the dummy region, a plurality of dummy active layers are disposed in the main surface of an SOI substrate and a plurality of dummy gate electrodes are disposed covering the respective dummy active layers. The arrangement pattern of the dummy active layers and the arrangement pattern of the dummy gate electrodes nearly match, so that the dummy gate electrodes are aligned accurately on the dummy active layers.
1. A semiconductor device comprising:
an SOI substrate having a substrate portion as a foundation, a buried oxide film provided on said substrate portion, and an SOI layer provided on said buried oxide film;
an inductance element provided above said SOI layer;
an MOS transistor provided on said SOI substrate;
a plurality of first active layers provided in a main surface of said SOI layer in a first region under said inductance element, said plurality of first active layers being electrically isolated from outside of the semiconductor device and being independent of, and electrically isolated from, each other; and
a plurality of first gate electrodes provided on said main surface of said SOI layer in said first region being electrically isolated from outside of the semiconductor device and being independent of, and electrically isolated from, each other.
2. The semiconductor device according to claim 1 , wherein an arrangement pattern of said plurality of first gate electrodes nearly matches with an arrangement pattern of said plurality of first active layers and said plurality of first gate electrodes are aligned on said plurality of first active layers.
3. The semiconductor device according to claim 1 , wherein said plurality of first active layers are formed of portions of said SOI layer that are separated and electrically isolated from each other by an isolation insulating film that extends from the surface of said SOI layer to reach said buried oxide film through said SOI layer.
4. The semiconductor device according to claim 1 , wherein, during manufacture, said plurality of first gate electrodes are protected from introduction of impurities into said MOS transistor.
5. The semiconductor device according to claim 4 , wherein surfaces of said plurality of first gate electrodes are protected from silicide film formation on at least one of a gate electrode and a source/drain layer of said MOS transistor.
6. The semiconductor device according to claim 1 , wherein, during manufacture, said plurality of first active layers are protected from introduction of impurities into said MOS transistor.
7. The semiconductor device according to claim 6 , wherein surfaces of said plurality of first active layers are protected from silicide film formation on at least one of a gate electrode and a source/drain layer of said MOS transistor.