Method of manufacturing NAND flash device

1. A method of manufacturing a NAND flash device, comprising the steps of:

performing a first ion implantation process for forming a triple well in a semiconductor substrate and a second ion implantation process for forming a P well in a first region of the triple well;

performing a first annealing process for curing damages of the semiconductor substrate by the first and second ion implantation processes; and

performing a third ion implantation process for forming an N well in a second region of the triple well and a fourth ion implantation process for controlling a threshold voltage.

2. The method of claim 1 , further comprising performing a second annealing process for curing damages of the semiconductor substrate by the third and fourth ion implantation processes after the fourth ion implantation process and before a deposition of another film.

3. The method of claim 1 , wherein the first annealing process is performed at a temperature ranging from 700 to 1100° C. and under N 2 gas atmosphere.

4. The method of claim 2 , wherein the second annealing process is performed at a temperature ranging from 700 to 1100° C. and under N 2 gas atmosphere.

5. A method of manufacturing a NAND flash device, comprising the steps of:

forming a triple well, a P well, an N well and an ion layer for controlling a threshold voltage on a semiconductor substrate by performing predetermined ion implantation processes; and

performing an annealing process for curing damages of the semiconductor substrate by the ion implantation processes before forming a gate oxide film,

wherein, the P well is formed in a first region of the triple well, and the N well is formed in a second region of the triple well.

6. The method of claim 5 , wherein the annealing process is performed at a temperature ranging from 700 to 1100° C. under N 2 gas atmosphere.