IP Library Granted Patent US 7,338,851
Granted Patent B2
US 7,338,851 · App. 10/890,181 · Granted Mar 4, 2008

Diode/superionic conductor/polymer memory structure

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,338,851
App. No.
10/890,181
Granted
Mar 4, 2008
Kind
B2
Abstract

A conjugated polymer layer with a built-in diode is formed by providing a first metal-chalcogenide layer over a bottom electrode. Subsequently, a second metal-chalcogenide layer is provided over and in contact with the first metal-chalcogenide layer. The first metal-chalcogenide layer has a first conductivity type and the second metal-chalcogenide layer has a second conductivity type. The plane of contact between the first and second metal-chalcogenide layers creates the p-n junction of the built-in diode. Then a polymer layer is selectively deposited on the second metal-chalcogenide layer. The second metal-chalcogenide layer provides ions to the polymer layer to change its resistivity. A top electrode is then provided over the polymer layer. An exemplary memory cell may have the following stacked structure: first electrode/n-type semiconductor/p-type semiconductor/conjugated polymer/second electrode.

Claims (11)

1. A method of forming a semiconductor device, comprising the steps of:

forming a first electrode;

forming a first metal-chalcogenide layer having a first conductivity type in contact with said first electrode;

forming a second metal-chalcogenide layer having a second conductivity type in contact with said first metal-chalcogenide layer;

forming a polymer memory element in contact with said second metal-chalcogenide layer, wherein said polymer memory element has a convex upper surface; and

forming a second electrode in contact with said polymer memory element.

2. The method of claim 1 , wherein said steps of forming said first metal-chalcogenide layer and forming said second metal-chalcogenide layer include sputtering and etching.

3. The method of claim 1 , wherein said step of forming a polymer memory element includes depositing a material that adheres preferentially to the second metal-chalcogenide layer.

4. The method of claim 3 , wherein said material is a conjugated polymer that changes resistance in response to an applied electric field.

5. The method of claim 4 , wherein said conjugated polymer is selected from the group consisting of polymethylphenylacetylene, copperphtalocyanine, polyparaphenylene, polyphenylenevinylene, polyaniline, polythiophene and polypyrrole.

6. The method of claim 3 , wherein the step of forming a polymer memory element includes locating said semiconductor device within an enclosed chamber with a liquid monomer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 1, 2016
From: MICRON TECHNOLOGY, INC
To: OVONYX MEMORY TECHNOLOGY, LLC
Reel/Frame 039974/0496 →