Multiple gate semiconductor device and method for forming same
View Patent ↗A multiple gate semiconductor device. The device includes at least two gates. The dopant distribution in the semiconductor body of the device varies from a low value near the surface of the body towards a higher value inside the body of the device.
1. A multi-gate semiconductor device comprising:
a source region;
a drain region;
a semiconductor body in between the source region and the drain region, the body connecting the source region and the drain region; and
a gate structure formed on at least two sides of the body,
wherein the semiconductor body consists of a bulk region and a surface region that are doped with the same dopant type, wherein the surface region is located between the gate structure and two sidewalls of the bulk region, wherein the bulk region has a first dopant concentration level and the surface region has a second dopant concentration level, and wherein the second dopant concentration level is less than the first dopant concentration level.
2. The device of claim 1 , wherein the multi-gate semiconductor device is a FinFET device and the semiconductor body comprises a fin of the FinFET device.
3. The device of claim 2 , wherein the first dopant concentration level remains constant over the bulk region.
4. The device of claim 3 , wherein the second dopant concentration level remains constant over the surface region.
5. The device of claim 2 , wherein the second dopant concentration level remains constant over the surface region.
6. The device of claim 2 , wherein the second dopant concentration decreases from the first dopant concentration level to the second dopant concentration level within the surface region.
7. The device of claim 1 , wherein the first dopant concentration level remains constant over the bulk region.
8. The device of claim 7 , wherein the second dopant concentration level remains constant over the surface region.
9. The device of claim 1 , wherein the second dopant concentration level decreases from the first dopant concentration level to the second dopant concentration level within the surface region.
10. A method for manufacturing a retrograde doped FinFET, comprising:
providing a substrate;
forming a source region on the substrate
forming a drain region on the substrate;
forming a fin on the substrate, wherein the fin connects the source and the drain and has a first dopant concentration; and
forming a layer directly on exposed surfaces of the fin, the layer having a second dopant concentration lower than the first dopant concentration, wherein the fin and the layer are doped with the same dopant type.
11. The method of claim 10 , wherein the second dopant concentration remains constant over the layer.
12. The method of claim 11 , wherein the first dopant concentration remains constant over the fin.
13. The method of claim 10 , wherein the second dopant concentration decreases from the first dopant concentration to the second dopant concentration within the layer.
14. The method of claim 10 , wherein forming the layer includes in-situ doping of the layer.
15. The method of claim 10 , wherein the layer is formed using epitaxial layer growth.
16. A FinFET comprising:
a silicon-on-insulator substrate comprising a source region, a drain region, and a semiconductor fin connecting the source region and the drain region,
wherein the semiconductor fin comprises a retrograde dopant profile from two upstanding sidewalls towards a bulk of the fin.
17. A method for manufacturing a FinFET, comprising:
providing a silicon-on-insulator substrate
forming on the substrate a source region, a drain region, and a fin connecting the source and the drain regions, wherein the fin is doped with a dopant having a first concentration level; and
forming a layer directly on exposed surfaces of the fin, wherein the layer is doped with the same dopant type as the fin but at a lower concentration level.