IP Library Granted Patent US 7,064,047
Granted Patent B2
US 7,064,047 · App. 10/893,297 · Granted Jun 20, 2006

Semiconductor device having a ball grid array and a fabrication process thereof

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Quick Facts
Patent No.
US 7,064,047
App. No.
10/893,297
Granted
Jun 20, 2006
Kind
B2
Abstract

A semiconductor device has a resin package layer on a principal surface of a semiconductor chip, on which a number of bump electrodes are formed, wherein the semiconductor device has a chamfer surface or a stepped surface on a top edge part such that the external shock or stress applied to such an edge part is dissipated by the chamfer surface of the stepped surface.

Claims (30)

1. A method of fabricating a semiconductor device, comprising the steps of:

forming a resin layer on a principal surface of a semiconductor substrate;

grooving said resin layer along a dicing line on said semiconductor substrate to form a first groove having a substantially rectangular cross-section and a first width in said resin layer;

and dicing, after said step of grooving, said semiconductor substrate along said first groove by forming a second groove with a second width smaller than said first width of said first groove.

2. A method as claimed in claim 1 , wherein said step of grooving is conducted along said dicing line for an entire length thereof on said substrate.

3. A method as claimed in claim 1 , wherein said step of grooving is conducted in the vicinity of cross points of mutually crossing dicing lines to form said first groove in the form of isolated cross-mark patterns.

4. A method of fabricating a semiconductor device, comprising the step of:

adhering a semiconductor substrate on a dicing apparatus by an adhesive tape;

dicing said semiconductor substrate in a first direction such that said adhesive tape remains substantially intact;

dicing said semiconductor substrate in a second, different direction together with said adhesive tape, to form a plurality of adhesive strips each carrying thereon a plurality of semiconductor chips aligned in a row; and

applying a V-shaped saw blade having a V-shape saw edge laterally to each of said adhesive strips such that said V-shaped saw blade cuts into a gap formed between a pair of adjacent semiconductor chips by said dicing step conducted in said first direction, said saw blade thereby forming a chamfer surface on a side wall of said semiconductor chips such that said chamfer surface extends, in each of said semiconductor chips, generally perpendicularly to a principal surface of said semiconductor chip.

5. A method of fabricating a semiconductor device, comprising the steps of:

forming a V-shaped groove on a top surface of a semiconductor substrate, said semiconductor device carrying an electronic circuit on said top surface;

forming a resin layer on said top surface of said semiconductor substrate so as to fill said V-shaped groove; and

dicing said semiconductor substrate by a dicing saw having a blade width smaller than a width of said V-shaped groove, along said V-shaped groove.

6. A method as claimed in claim 5 , wherein said method further comprises the steps of: forming another V-shaped groove on a bottom surface of said semiconductor substrate; and forming another resin layer on said bottom surface of said semiconductor substrate so as to fill said another V-shaped groove, and

wherein said dicing step is conducted by said dicing saw such that said dicing saw cuts said resin layer and said another resin layer simultaneously.

7. A method of fabricating a semiconductor device, comprising the steps of:

slicing a semiconductor substrate from a semiconductor ingot;

applying a resin layer on a first surface of said semiconductor substrate such that said resin layer has a planarized surface;

grinding a second surface of said semiconductor substrate while using said planarized surface of said resin layer as a reference surface, to form a planarized surface on said second surface; and

grinding said first surface while using said second, planarized surface as a reference surface, to form a planarized surface on said first surface.

8. A method of fabricating a semiconductor device, comprising the steps of:

mounting a semiconductor device having a chamfered surface and a plurality of bump electrodes on a transportation device,

said transportation device comprising a tray member adapted to support said semiconductor device in a face-down state, said tray member having an opening for accommodating said bump electrodes when said semiconductor device is mounted on said tray member, and a removable cap member provided on said tray member removably, said removable cap member covering said tray member in a state in which said semiconductor device is mounted on said tray member, said tray member including a chamfer surface for engagement with said chamfer surface on said semiconductor device; and

transporting said semiconductor device in a state mounted on said transportation device.

9. A method of fabricating a semiconductor device, comprising the steps of:

mounting a semiconductor device having a stepped surface and a plurality of bump electrodes on a transportation device,

said transportation device comprising a tray member adapted to support said semiconductor device in a face-down state, said tray member having an opening for ccommodating said bump electrodes when said semiconductor device is mounted on said tray member, and a removable cap member provided on said tray member removably, said removable cap member covering said tray member in a state in which said semiconductor device is mounted on said tray member, said tray member including a stepped surface for engagement with said stepped surface on said semiconductor device; and

transporting said semiconductor device in a state mounted on said transportation device.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 27, 2015
From: FUJITSU SEMICONDUCTOR LIMITED
To: SOCIONEXT INC.
Reel/Frame 035508/0637 →
CHANGE OF NAME Recorded Jul 9, 2010
From: FUJITSU MICROELECTRONICS LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 024651/0744 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 9, 2008
From: FUJITSU LIMITED
To: FUJITSU MICROELECTRONICS LIMITED
Reel/Frame 021976/0089 →