High voltage integrated circuit driver with a high voltage PMOS bootstrap diode emulator
A high voltage circuit driver includes high and low side driver cells to drive a high and a low side power MOSFET, a bootstrap circuit to energize the high side driver cell, a high voltage PMOS transistor (HVPMOS) between a voltage source and the bootstrap circuit, wherein the HVPMOS is embedded in an N-isolation layer and is integrated with the driver cells. A bootstrap control circuit, for controlling the HVPMOS, includes a high voltage level shift stage, which can also be embedded in an N-isolation layer. The circuit driver is operated by switching the high side drive signal from high to low, the low side drive signal from low to high with a first delay, and a bootstrap control signal from high to low with an additional second delay. Also, the bootstrap capacitor is first charged by switching on the HVPMOS, and then it energizes the high side driver cell.
1. A high voltage circuit driver, comprising:
a high side driver cell, operable to drive a gate of a high side power MOSFET;
a low side driver cell, operable to drive a gate of a low side power MOSFET;
a bootstrap circuit, coupled between an output node and a supply-voltage terminal of the high side driver cell;
a high voltage PMOS transistor, coupled between a first voltage source terminal and the bootstrap circuit, wherein the high voltage PMOS transistor is embedded in an N-isolation layer and is integrated with the driver cells, wherein the high voltage PMOS transistor is configured as a diode emulator;
a bootstrap control circuit, coupled to the high voltage PMOS transistor; and
a high side driver control circuit and a low side driver control circuit, coupled to the high side driver cell and the low side driver cell, respectively.
2. A high voltage circuit driver, comprising:
a high side driver cell, operable to drive a gate of a high side power MOSFET;
a low side driver cell, operable to drive a gate of a low side power MOSFET;
a bootstrap circuit, coupled between an output node and a supply-voltage terminal of the high side driver cell;
a high voltage PMOS transistor, coupled between a first voltage source terminal and the bootstrap circuit, wherein the high voltage PMOS transistor is embedded in an N-isolation layer and is integrated with the driver cells;
a bootstrap control circuit, coupled to the high voltage PMOS transistor; and
a high side driver control circuit and a low side driver control circuit, coupled to the high side driver cell and the low side driver cell, respectively;
wherei the circuit driver does not contain circuit elements to control a voltage between the body and one of the source and the drain of the high voltage PMOS transistor.
3. A high voltage circuit driver, comprising:
a high side driver cell, operable to drive a gate of a high side power MOSFET;
a low side driver cell, operable to drive a gate of a low side power MOSFET;
a bootstrap circuit, coupled between an output node and a supply-voltage terminal of the high side driver cell;
a high voltage PMOS transistor, coupled between a first voltage source terminal and the bootstrap circuit, wherein the high voltage PMOS transistor is embedded in an N-isolation layer and is integrated with the driver cells;
a bootstrap control circuit, coupled to the high voltage PMOS transistor, wherein a level shifting stage of the bootstrap control circuit is embedded in an N-isolation well; and
a high side driver control circuit and a low side driver control circuit, coupled to the high side driver cell and the low side driver cell, respectively.
4. A high voltage circuit driver, comprising:
a high side driver cell, operable to drive a gate of a high side power MOSFET;
a low side driver cell, operable to drive a gate of a low side power MOSFET;
a bootstrap circuit, coupled between an output node and a supply-voltage terminal of the high side driver cell;
a high voltage PMOS transistor, coupled between a first voltage source terminal and the bootstrap circuit, wherein the high voltage PMOS transistor is embedded in an N-isolation layer and is integrated with the driver cells;
a bootstrap control circuit, coupled to the high voltage PMOS transistor; and
a high side driver control circuit and a low side driver control circuit, coupled to the high side driver cell and the low side driver cell, respectively;
wherein the circuit driver is configured to be part of a DC-to-DC converter.
5. A high voltage circuit driver, comprising:
a high side driver cell, operable to drive a gate of a high side power MOSFET;
a low side driver cell, operable to drive a gate of a low side power MOSFET;
a bootstrap circuit, coupled between an output node and a supply-voltage terminal of the high side driver cell;
a high voltage PMOS transistor, coupled between a first voltage source terminal and the bootstrap circuit, wherein the high voltage PMOS transistor is embedded in an N-isolation layer and is integrated with the driver cells;
a bootstrap control circuit, coupled to the high voltage PMOS transistor;
a high side driver control circuit and a low side driver control circuit, coupled to the high side driver cell and the low side driver cell, respectively; and
an inductor-capacitor filter circuit, coupled between the output node and a ground.
6. A controller of a high voltage driver,
the high voltage driver comprising:
a high side power MOSFET, configured to be coupled between a power supply and an output node;
a low side power MOSFET, coupled between the output node and a ground;
a high side driver cell, coupled to a gate of the high side power MOSFET;
a low side driver cell, coupled to a gate of the low side power MOSFET;
a bootstrap circuit, coupled between the output node and a supply-voltage terminal of the high side driver cell; and
a high voltage PMOS transistor, coupled between a first voltage source and the bootstrap circuit;
the controller comprising:
a comparator;
a delay element, coupled to the comparator;
logic circuitry, a first input of the logic circuitry coupled to the delay element; and
a high voltage level shift stage, the output of the logic circuitry coupled into the high voltage level shift stage, the output of the high voltage level shift stage coupled to the high voltage PMOS transistor; wherein
the high voltage level shift stage is embedded in an N-isolation layer and is integrated with the driver cells.
7. The controller of claim 6 , the logic circuitry comprising:
a NOR gate, a first input terminal of the NOR gate coupled to the delay element and a second input terminal of the NOR gate coupled to a logic input terminal through an inverter.
8. The controller of claim 7 , further comprising:
a Set-Reset latch, a Set input terminal of the Set-Reset latch coupled to an output terminal of the NOR gate and a Reset input terminal of the latch coupled to the second input terminal of the NOR gate, an output terminal of the latch coupled to a gate of the high voltage PMOS transistor.
9. The controller of 6 , wherein the high voltage PMOS transistor is embedded into an N-isolation layer.
10. The method of operating a high voltage driver, the method comprising:
switching a high side drive signal from high to low, applied to a high side driver cell of a converter;
switching a low side drive signal from low to high with a first delay, applied to a low side driver cell of the converter; and
switching a bootstrap control signal from high to low with a second delay, applied to a high voltage PMOS transistor, the PMOS transistor being embedded into an N-isolation layer and integrated with the driver cells, the high voltage PMOS transistor being configured as a diode emulator, wherei the second delay is partially subsequent to the first delay.
11. The method of claim 10 , the method further comprising:
controlling the high voltage driver to ensure that a high side power transistor, driven by the high side driver cell, and a low side power transistor, driven by the low side driver cell, are not switched on simultaneously.
12. A method of operating a driver controller, the method comprising:
switching on a low side power MOSFET, coupled between an output node and a ground, for a first interval;
charging a bootstrap capacitor by switching on a high voltage PMOS transistor, the PMOS transistor being coupled between a first voltage source and a first plate of the bootstrap capacitor and embedded into an N-isolation layer, the high voltage PMOS transistor being configured as a diode emulator, wherein the second plate of the bootstrap capacitor is coupled to the output node; and
energizing a high side driver cell by the charged bootstrap capacitor for a second interval, whereby the high side driver cell provides a predetermined voltage to a gate of a high side power MOSFET.
13. The method of claim 12 , comprising:
switching on the high side power MOSFET in the second interval, thereby:
raising the voltage of the output node; and
operating the high side driver cell in a floating voltage mode.
14. The circuit driver of claim 1 , wherein the circuit driver is implemented as a single integrated circuit device.
15. The circuit driver of claim 1 , wherein the power supply is capable of providing a voltage between 0V and 30V.
16. The circuit driver of claim 1 , wherein at least two of the bootstrap control circuit, the high side driver control circuit, and the low side driver control circuit are integrated into a control circuit.
17. The circuit driver of claim 2 , wherein the circuit driver is implemented as a single integrated circuit device.
18. The circuit driver of claim 2 , wherein the source and the body of the high voltage PMOS transistor are electrically coupled.
19. The circuit driver of claim 2 , wherein the high voltage PMOS transistor is configured to be operated at a floating voltage.
20. The circuit driver of claim 2 , wherein the power supply is capable of providing a voltage between 0V and 30V.
21. The circuit driver of claim 2 , wherein at least two of the bootstrap control circuit, the high side driver control circuit, and the low side driver control circuit are integrated into a control circuit.
22. The circuit driver of claim 9 , wherein the circuit driver is implemented as a single integrated circuit device.
23. The circuit driver of claim 9 , wherein the source and the body of the high voltage PMOS transistor are electrically coupled.
24. The circuit driver of claim 9 , wherein the high voltage PMOS transistor is configured to be operated at a floating voltage.
25. The circuit driver of claim 9 , wherein the power supply is capable of providing a voltage between 0V and 30V.
26. The circuit driver of claim 3 , wherein at least two of the bootstrap control circuit, the high side driver control circuit, and the low side driver control circuit are integrated into a control circuit.
27. The circuit driver of claim 4 , wherein the circuit driver is implemented as a single integrated circuit device.
28. The circuit driver of claim 4 , wherein the source and the body of the high voltage PMOS transistor are electrically coupled.
29. The circuit driver of claim 4 , wherein the high voltage PMOS transistor is configured to be operated at a floating voltage.
30. The circuit driver of claim 4 , wherein the power supply is capable of providing a voltage between 0V and 30V.
31. The circuit driver of claim 4 , wherein at least two of the bootstrap control circuit, the high side driver control circuit, and the low side driver control circuit are integrated into a control circuit.
32. The circuit driver of claim 5 , wherein the circuit driver is implemented as a single integrated circuit device.
33. The circuit driver of claim 5 , wherein the source and the body of the high voltage PMOS transistor are electrically coupled.
34. The circuit driver of claim 5 , wherein the high voltage PMOS transistor is configured to be operated at a floating voltage.
35. The circuit driver of claim 5 , wherein the power supply is capable of providing a voltage between 0V and 30V.
36. The circuit driver of claim 5 , wherein at least two of the bootstrap control circuit, the high side driver control circuit, and the low side driver control circuit are integrated into a control circuit.
37. A circuit driver for driving a high side power MOSFET and a low side power MOSFET coupled together at an output node and in series between a battery voltage and ground, the circuit driver comprising:
a high side driver cell operable to drive the high side power MOSFET;
a low side driver cell operable to drive the low side power MOSFET;
bootstrap circuitry coupled to the output node and operable to provide power to the high side driver cell;
a high voltage PMOS transistor, coupled between a first voltage source terminal and the bootstrap circuitry, wherein the high voltage PMOS transistor is configured as a diode emulator and is embedded in an N-isolation layer, thereby enabling the high voltage PMOS transistor to accommodate high voltage values of the battery voltage; and
control circuitry operable to control the high voltage PMOS transistor, the high side driver cell, and the low side driver cell.
38. The circuit driver of claim 37 , wherein the circuit driver is implemented as a single integrated circuit device.
39. The circuit driver of claim 37 , wherein the source and the body of the high voltage PMOS transistor are electrically coupled.
40. The circuit driver of claim 37 , wherein the high voltage PMOS transistor is configured to be operated at a floating voltage.
41. The circuit driver of claim 37 , wherein the power supply is capable of providing a voltage between 0V and 30V.