IP Library Granted Patent US 6,953,748
Granted Patent B2
US 6,953,748 · App. 10/898,281 · Granted Oct 11, 2005

Method of manufacturing semiconductor device

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 6,953,748
App. No.
10/898,281
Granted
Oct 11, 2005
Kind
B2
Abstract

To enhance and/or improve reliability in a method of forming a semiconductor device. An exemplary method of forming a semiconductor device forms a conductive part within a concave portion which is formed in a first surface of a semiconductor substrate. The semiconductor substrate includes an integrated circuit. The method also thins the substrate by removing a part of a second surface of the semiconductor substrate so as to make the conductive part penetrate from the first surface to the second surface, and cuts the semiconductor substrate into pieces. An electric property of the semiconductor substrate is inspected through the conductive part after the conductive part is formed.

Claims (23)

1. A method of manufacturing a semiconductor device, comprising:

(a) preparing a semiconductor substrate having an integrated circuit and an electrode electrically coupled to the integrated circuit on the first surface of the semiconductor substrate;

(b) forming a through-hole in the electrode;

(c) forming a concave portion in the semiconductor substrate, the concave portion communicates within the through-hole;

(d) forming a conductive part within the concave portion, the conductive part formed within the through-hole;

(e) thinning the semiconductor substrate by removing a part of a second surface of the semiconductor substrate so as to make the conductive part penetrate from the first surface to the second surface;

(f) cutting the semiconductor substrate into pieces; and

(g) inspecting an electric property of the semiconductor substrate through the conductive part after step (d) is finished.

2. The method of manufacturing a semiconductor device according to claim 1 , further including forming the conductive part to have a brazing layer on a top surface of the conductive part in step (d).

3. The method of manufacturing a semiconductor device according to claim 1 , further including forming the conductive part to have a gold layer on a top surface of the conductive part in step (d).

4. The method of manufacturing a semiconductor device according to claim 1 , further including conducting the inspecting process before step (e).

5. The method of manufacturing a semiconductor device according to claim 1 , step (f) further comprising:

(f1) providing a reinforcing member on the semiconductor substrate;

(f2) conducting the inspecting process; and

(f3) cutting the semiconductor substrate.

6. The method of manufacturing a semiconductor device according to claim 5 , further comprising applying a tape to one of the first surface or the second surface of the reinforcing member and a supporting member which supports the tape.

7. The method of manufacturing a semiconductor device according to claim 1 , further including:

stacking a plurality of semiconductor devices which are manufactured by the method according to claim 1 .

8. A method of manufacturing a semiconductor device, comprising:

(a) preparing a semiconductor substrate having an integrated circuit and an electrode electrically coupled to the integrated circuit on the first surface of the semiconductor substrate;

(b) forming a through-hole in the electrode;

(c) forming a conductive part within the through-hole, the conductive part penetrates the semiconductor substrate from the first surface to the second surface of the semiconductor substrate;

(d) inspecting an electric property of the semiconductor substrate through the conductive part after step (c) is finished.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 21, 2017
From: SEIKO EPSON CORPORATION
To: ADVANCED INTERCONNECT SYSTEMS LIMITED
Reel/Frame 044938/0869 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 14, 2004
From: YAMAGUCHI, KOJI
To: SEIKO EPSON CORPORATION
Reel/Frame 015247/0463 →