Semiconductor device and method for fabricating the same
View Patent ↗A semiconductor device is proposed, in which a chip is placed in an opening penetratingly formed in a substrate in a manner as not to come into contact with the substrate, and an encapsulant formed on the substrate fills up the opening for encapsulating the chip. This arrangement of the chip accommodated in the substrate therefore reduces the overall height of the semiconductor device. Moreover, a plurality of conductive elements disposed on the substrate are also encapsulated by the encapsulant in a manner that, bottom sides of the conductive elements are exposed to outside of the encapsulant, and coplanarly positioned with a bottom side of the encapsulant. This therefore provides good planarity for a bottom side of the semiconductor device, allowing the semiconductor device to be well electrically connected to external devices. A method for fabricating the foregoing semiconductor device is also proposed.
1. A method for fabricating a semiconductor device, comprising:
accommodating a chip in an opening of a substrate such that an inactive side of the chip is attached to a tape;
forming a plurality of first conductive elements for connecting an active side of the chip to conductive traces on the substrate;
forming a plurality of second conductive elements on a first side of the substrate; and
forming a first encapsulant on the first side of the substrate for encapsulating the chip, the first conductive elements, the second conductive elements and the conductive traces, wherein bottom sides of the second conductive elements are exposed to an outside of the first encapsulant, and coplanarly positioned with a bottom side of the first encapsulant.
2. The method of claim 1 , wherein said plurality of conductive traces are disposed on the first side of the substrate.
3. The method of claim 1 , wherein said substrate has a second side opposite said first side.
4. The method of claim 2 , wherein said tape is attached to the second side of the substrate for covering one end of the opening of the substrate.
5. The method of claim 1 , wherein said tape is dimensionally larger than the opening.
6. The method of claim 1 , wherein said active side of said chip is opposite said inactive side.
7. The method of claim 1 , wherein said chip is dimensionally smaller in surface area than the opening.
8. The method of claim 1 , wherein said plurality of first conductive elements connecting the active side of the chip to the conductive traces on the substrate establish electrical connection between the chip and the substrate.
9. The method of claim 1 , wherein said second conductive elements are electrically connected to the conductive traces on the substrate.