IP Library Granted Patent US 7,230,645
Granted Patent B2
US 7,230,645 · App. 10/901,114 · Granted Jun 12, 2007

Method of operating a CMOS APS pixel sensor

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Quick Facts
Patent No.
US 7,230,645
App. No.
10/901,114
Granted
Jun 12, 2007
Kind
B2
Abstract

A method of operating a CMOS imager is presented wherein a reset transistor source/drain of a first pixel is biased with a first voltage source, a source follower transistor of a second pixel is biased with the same first voltage source, a reset transistor source/drain of the second pixel is biased with a second voltage source, and the first voltage source is dropped to ground during a reset of the second pixel.

Claims (13)

1. A method of operating a pixel circuit, comprising:

biasing a reset transistor source/drain of a first pixel with a first voltage source on a first line;

biasing a source follower transistor source/drain of a second pixel with the first voltage source on the first line;

biasing a reset transistor source/drain of the second pixel with a second voltage source on a second line;

during a reset of the second pixel, dropping the first voltage source to ground; and

controlling the reset transistor of the first pixel by a signal pulsed on a third line.

2. A method as in claim 1 , wherein said resetting of the second pixel comprises pulsing a signal on a shared reset/select line connected to the gate of the reset transistor of the second pixel and a gate of a select transistor of a third pixel.

3. A method as in claim 1 , further comprising:

raising the first voltage source during the reset sampling of the second pixel.

4. A method as in claim 1 , further comprising:

prior to said reset, reading out a pixel signal sample by pulsing a signal on a shared reset/select line connected to the gate of a select transistor of the second pixel and the gate of the reset transistor of the first pixel.

5. A method as in claim 1 , further comprising:

subsequent to said reset, reading out a reference voltage by pulsing a signal on a shared reset/select line connected to the gate of a select transistor of the second pixel and the gate of the reset transistor of the first pixel.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 4, 2010
From: MICRON TECHNOLOGY, INC.
To: ROUND ROCK RESEARCH, LLC
Reel/Frame 023786/0416 →