Complementary metal oxide semiconductor image sensor and method for fabricating the same
View Patent ↗A complementary metal oxide semiconductor image sensor and a method for fabricating the same are disclosed, wherein a width of a depletion area of a photodiode is varied by variably applying a back bias voltage to a semiconductor substrate without using any color filter, thereby preventing a back bias voltage from influencing a transistor formed on the outside of a photodiode in a CMOS image sensor sensing optical color sensitivity of light rays irradiated to the photodiode. The CMOS image sensor includes a first conductive semiconductor substrate having a first region for forming a photodiode and a second region for forming transistors and having a back bias voltage for varying a width of a depletion area in the first region applied thereon, a plurality of transistors formed in the second region of the semiconductor substrate, a photodiode formed in the first region of the semiconductor substrate, a second conductive buried layer formed in the second region of the semiconductor substrate, so as to prevent the back bias voltage from influencing the transistors, and a first isolating barrier formed within the semiconductor substrate, so as to surround a side portion of the second region.
1. A method for fabricating a complementary metal oxide semiconductor (CMOS) image sensor, comprising:
preparing a first conductive type semiconductor substrate having a first region for forming a photodiode and a second region for forming transistors defined thereon;
implanting impurity ions into the second region of the semiconductor substrate to form a first buried layer of a second conductive type;
forming a first trench in an area of the semiconductor substrate surrounding the second region, and forming a second trench in an area of the semiconductor substrate surrounding the first region;
forming a photosensitive layer over the semiconductor substrate and patterning the photosensitive layer to expose the first trench;
implanting impurity ions of the second conductive type into the semiconductor substrate through the exposed first trench to form a second buried layer between the first trench and the first buried layer;
removing the patterned photosensitive layer;
forming an isolating barrier in the first trench and the second trench; and
forming a photodiode in the first region of the semiconductor substrate, and forming a transistor in the second region of the semiconductor substrate.
2. The method according to claim 1 , further comprising:
forming an interlayer dielectric on the semiconductor substrate including the transistor;
forming a planarization layer on the interlayer dielectric; and
forming a micro lens on the planarization layer, so as to be located above the photodiode.
3. The method according to claim 1 , wherein the first trench and the second trench are formed to have a depth smaller than that of the first buried layer.
4. The method according to claim 1 , wherein the isolating barrier is formed of an insulating layer.
5. The method according to claim 1 , wherein the isolating barrier of the first trench is formed of a conductive layer, and the isolating barrier of the second trench is formed of an insulating layer.
6. The method according to claim 1 , wherein a back bias voltage is applied to the semiconductor substrate for varying a width of a depletion area of the photodiode.