Methods for fabricating flash memory devices

1. A method for fabricating a flash memory device comprising:

forming an undoped polysilicon layer on a semiconductor substrate;

injecting dopants having stepped implantation energy levels into the undoped polysilicon layer to form a plurality of doped polysilicon layers and a plurality of undoped polysilicon layers at discrete interval layers, wherein the undoped polysilicon layers and the doped polysilicon layers are disposed in alternating layers;

forming a photoresist pattern on the polysilicon layer having the undoped and the doped polysilicon layers at discrete interval layers; and

etching the polysilicon layer having the undoped and the doped polysilicon layers at discrete interval layers to form a floating gate.

2. A method as defined by claim 1 , wherein the polysilicon layer is formed over a gate oxide layer formed on the semiconductor substrate.

3. A method as defined by claim 1 , wherein etching the polysilicon layer forms the floating gate with sidewalls having convexo-concave( ) shapes.

4. A method as defined by claim 3 , wherein a number of the stepped implantation energy levels corresponds to a number of the convexo-concave( ) shapes to be formed in the sidewalls of the floating gate.

5. A method as defined by claim 1 , further comprising annealing to diffuse the dopants in the floating gate.

6. A method as defined by claim 5 , wherein the annealing is performed after etching the polysilicon layer to form the floating gate.

7. A method as defined by claim 6 , further comprising forming an insulating layer on the floating gate having the diffused dopants.

8. A method as defined by claim 7 , further comprising:

forming a polysilicon layer on the insulating layer; and

etching the polysilicon layer to form a control gate.

9. A method as defined by claim 7 , wherein the insulating layer is formed of ONO layer.