Semiconductor transistor
View Patent ↗A semiconductor transistor includes a substrate, a gate insulating layer positioned on the surface of the substrate, a gate positioned on the gate insulating layer, a channel region positioned in the substrate corresponding to the gate, and a source region and a drain region respectively positioned alongside the channel region. The source region and the drain region are mainly made of a first material and a second material, wherein the first material and the second material have a same lattice structure and different spacing. The source region and the drain region each include a main region in which a percentage of the second material is constant, and a peripheral region in which a percentage of the second material is graded.
1. A semiconductor transistor comprising:
a substrate;
a gate insulating layer positioned on the surface of the substrate;
a gate positioned on the gate insulating layer;
a channel region positioned in the substrate corresponding to the gate; and
a source region and a drain region respectively positioned alongside the channel region, the source region and the drain region including a first material and a second material, the first material and the second material having a same lattice structure and different spacing, both the source region and the drain region comprising a main region and a peripheral region, wherein the main region of the source region comprises the first material and the second material, the main region of the drain region comprises the first material and the second material, a percentage of the second material in the main region of the source region and a percentage of the second material in the main region of the drain region are constant, and a percentage of the second material in the peripheral region of the source region and a percentage of the second material in the peripheral region of the drain region are graded, and wherein the peripheral region of the source region surrounds a bottom portion of the main region of the source region, and the peripheral region of the drain region surrounds a bottom portion of the main region of the drain region.
2. The semiconductor transistor of claim 1 , wherein the percentage of the second material in each peripheral region decreases from an interface between the main region and the peripheral region to an interface between the peripheral region and the substrate.
3. The semiconductor transistor of claim 2 , wherein the percentage of the second material in each peripheral region decreases from 30% to 0%.
4. The semiconductor transistor of claim 3 , wherein the percentage of the second material in each main region is approximately 30%.
5. The semiconductor transistor of claim 1 , wherein the first material is monocrystalline silicon.
6. The semiconductor transistor of claim 1 , wherein the second material is germanium.
7. The semiconductor transistor of claim 6 , wherein the semiconductor transistor is P type.
8. The semiconductor transistor of claim 1 , wherein the second material is carbon.
9. The semiconductor transistor of claim 8 , wherein the semiconductor transistor is N type.
10. The semiconductor transistor of claim 1 , wherein the first material and the second material are formed epitaxially.