Patent Assignment
Reel/Frame 056991/0292
Assignment of Assignor's Interest
Recorded: 2021-07-26
Pages: 37
Assignor
UNITED MICROELECTRONICS CORPORATION
Executed: 2021-06-18
Assignee
MARLIN SEMICONDUCTOR LIMITED
BRACKEN ROAD, SANDYFORD, FIRST FLOOR, BLACKTHORN EXCHANGE, DUBLIN, D18 P3Y9, IRELAND
Covered Properties
(483)
Semiconductor Device and Method for Fabricating the Same
Delay Lock Circuit Using Bisection Algorithm and Related Method
Method of Repairing a Low Dielectric Constant Material Layer
Patent:
6,521,547 →
Application:
09/682,479 →
Structure of a Test Key for Monitoring Salicide Residue
Patent:
6,521,910 →
Application:
09/682,946 →
Multi-Die Package
Patent:
6,570,246 →
Application:
10/064,110 →
Non-Volatile Memory Technology Suitable for Flash and Byte Operation Application
Composite Photoresist Structure
Method of Fabricating a Semiconductor Device
Method of Fabricating a Semiconductor Device
Composite Photoresist for Pattern Transferring
Method for Forming the Self-Aligned Buried N+ Type to Diffusion Process in Etox Flash Cell
Dual Damascene Process Using Metal Hard Mask
Plasma Apparatus and Method Capable of Adaptive Impedance Matching
Dynamic Random Access Memory Cell and Method for Fabricating the Same
Dynamic Random Access Memory Cell and Method for Fabricating the Same
Method for Preventing to Form a Spacer Undercut in Seg Pre-Clean Process
Method for Fabricating Semiconductor Device
Method for Fabricating Semiconductor Device
Method for Fabricating Semiconductor Device
Digital-To-Analog Converter and Related Level Shifter Thereof
Circuit to Characterize Matching of Energy-Storage Components
Patent:
7,126,322 →
Application:
11/163,437 →
Fabricating Method for a Metal Oxide Semiconductor Transistor
Metal Oxide Semiconductor Transistor
Method of Fabricating Openings
Opening Structure for Semiconductor Device
Method of Fabricating Openings and Contact Holes
Opening Structure with Sidewall of an Opening Covered with a Dielectric Thin Film
Method of Fabricating Openings and Contact Holes
Trench-Capacitor Dram Device and Manufacture Method Thereof
Two-Stage Level Shifting Module
Two-Stage Level Shifting Module
Patent:
7,388,403 →
Application:
11/751,041 →
Wafer Supporting Device of a Sputtering Apparatus
Data Retention Cell and Data Retention Method Based on Clock-Gating and Feedback Mechanism
Patent:
7,391,250 →
Application:
11/849,296 →
Method for Fabricating Semiconductor Device
Semiconductor Device with Trench of Various Widths
Tsv Structure and Method for Forming the Same
Semiconductor Chip Package Structure, Semiconductor Chip and Semiconductor Chip Group
Charge Pump
Voltage Regulating Circuit Configured to Have Output Voltage Thereof Modulated Digitally
Memory for a Voltage Regulator Circuit
Operation Method of a Supply Voltage Generation Circuit Used for a Memory Array
Memory, Supply Voltage Generation Circuit, and Operation Method of a Supply Voltage Generation Circuit Used for a Memory Array
Memory and Operation Method Thereof
Non-Planar Transistor
Method of Forming a Finfet Structure
Seal Ring Structure with a V-Shaped Dielectric Layer Conformally Overlapping a Conductive Layer
Method for Forming Semiconductor Structure Having Through Silicon via for Signal and Shielding Structure
Patent:
8,916,471 →
Application:
13/975,382 →
Semiconductor Device with Epitaxial Structures
Semiconductor Device
Light Detecting Device
Semiconductor Package Structure and Method for Manufacturing the Same
Semiconductor Package Structure and Method for Manufacturing the Same
Semiconductor Structure with Ubm Layer and Method of Fabricating the Same
Integrated Circuit and Signal Monitoring Method Thereof
Semiconductor Device and Method of Forming the Same
Memory Device
Flash Cell and Forming Process Thereof
Method of Forming Vertical Flash Memory
Vertical Flash Memory and Forming Method Thereof
Patent:
10,020,404 →
Application:
15/498,491 →
Method of Avoiding Dielectric Layer Deterioation with a Low Dielectric Constant During a Stripping Process
Method of Avoiding Dielectric Layer Deterioation with a Low Dielectric Constant
Interconnection Structure and Fabrication Method Thereof
Interconnection Structure and Fabrication Method Thereof
Barrier Layer Structure
Method for Forming Barrier Layer
Damascene Structure
Method of Fabricating a Dual Damascene Copper Wire
Patent:
6,849,541 →
Application:
10/707,517 →
Non-Volatile Memory with Induced Bit Lines
Patent:
6,878,988 →
Application:
10/709,854 →
Image Sensor Device with Color Filters and Manufacturing Method Thereof
Method of Fabricating Semiconductor Integrated Circuits
Method for Trimming Programmable Resistor to Predetermined Resistance
Method for Trimming Programmable Resistor to Predetermined Resistance
Trench Capacitor of a Dram and Fabricating Method Thereof
Trench Capacitor
Semiconductor Structure and Fabricating Method Thereof
Metal Oxide Semiconductor Transistor Device
Capacitance Dielectric Layer and Capacitor
Metal Oxide Semiconductor Transistor with Y Shape Metal Gate and Fabricating Method Thereof
Metal Oxide Semiconductor Transistor with Y Shape Metal Gate
Trench-Capacitor Dram Device and Manufacture Method Thereof
Trench-Capacitor Dram Device and Manufacture Method Thereof
Integrated Circuit Structure and Manufacturing Method Thereof
Method of Fabricating Semiconductor Device
Conductive Structure Having Capacitor
Capacitor Structure
Capacitor Structure
Alignment Mark and Defect Inspection Method
Metal Gate Transistor and Method for Fabricating the Same
Level Shifter Adaptive for Use in a Power-Saving Operation Mode
Metal Capacitor and Method of Making the Same
Metal Capacitor and Method of Making the Same Including Dielectric Layer of Different Mechanical Strength and Dielectric Constant Regions
Metal Capacitor and Method of Making the Same Including Dielectric Layer of Different Mechanical Strength Regions
Semiconductor process
Semiconductor Process
Sense Amplifier and Method for Determining Values of Voltages on Bit-Line Pair
Temperature Sensor Using Delay Circuit
Memory Structure
Integrated Circuit and Method of Forming Integrated Circuit
Patent:
9,064,719 →
Application:
14/324,090 →
Method for Manufacturing Silicon Nitride Layer and Method for Manufacturing Semiconductor Structure Applying the Same
Patent:
9,219,151 →
Application:
14/477,214 →
Structure with Inductor and Mim Capacitor
Semiconductor Device and Operating Method Thereof
Method of Fabricating Semiconductor Structure
Patent:
9,391,177 →
Application:
14/825,174 →
Operating Method of Memory Device
Patent:
9,530,511 →
Application:
14/969,584 →
Memory System Capable of Generating Notification Signals
Non-Volatile Memory Device and Manufacturing Method Thereof
Patent:
9,691,907 →
Application:
15/231,800 →
Six-Transistor Static Random Access Memory Cell and Operation Method Thereof
Intra-Metal Capacitor and Method of Forming the Same
Intra-Metal Capacitor and Method of Forming the Same
Semiconductor Memory Cell Structure
Semiconductor Device and a Method of Fabricating the Same
Method of Fabricating Semiconductor Device
Static Random Access Memory Having Insulating Layer with Different Thicknesses
Method for Fabricating Static Random Access Memory Having Insulating Layer with Different Thicknesses
Voltage Regulating Circuit
Semiconductor Structure and Manufacturing Method Thereof
Semiconductor Structure and Manufacturing Method Thereof
Level Shift Circuit Capable of Reducing Power Consumption
Patent:
10,177,763 →
Application:
15/877,368 →
Manufacturing Method of an Integrated Chip
Electrically Erasable Programmable Read-Only Memory Cell and Memory Device and Manufacturing Method Thereof
Electrically Erasable Programmable Read-Only Memory Cell and Memory Device and Manufacturing Method Thereof
Electrically Erasable Programmable Read-Only Memory Cell and Memory Device
Electrically Erasable Programmable Read-Only Memory Cell and Memory Device and Manufacturing Method Thereof
System-On-Chip with Shield Rings for Shielding Functional Blocks Therein from Electromagnetic Interference
System-On-Chip with Shield Rings for Shielding Functional Blocks Therein from Electromagnetic Interference
Method of Fabricating a Strained Silicon Channel Metal Oxide Semiconductor Transistor
Semiconductor Device
Semiconductor Device Having Fin-Shaped Structure and Method for Fabricating the Same
Method for Fabricating Semiconductor Device with Fin-Shaped Structure
Fan-Out Wafer Level Package
Capacitor in an Interconnect System and Method of Manufacturing Thereof
Mixed-Mode Process
Patent:
6,887,748 →
Application:
10/708,108 →
Semiconductor Transistor
Semiconductor Wafer and Method for Making the Same
Spacer Structure Wherein Carbon-Containing Oxynitride Film Formed Within
Spacer Structure Wherein Carbon-Containing Oxide Film Formed Within
Fabrication Method of Complementary Metal Oxide Semiconductor Image Sensor
Complementary Metal Oxide Semiconductor Image Sensor
Chemical Mechanical Polishing Process
Chemical Mechanical Polishing Process
Method for Forming Strained Semiconductor Device and Method for Forming Source/Drain Region
Fabricating Method of Semiconductor Device
Semiconductor Device
Fabricating Method of Semiconductor Structure
Semiconductor Structure and Fabricating Method Thereof
Method for Fabricating Strained-Silicon Metal-Oxide Semiconductor Transistors
Contiguous Microlens Array
Contiguous Microlens Array and Photomask for Defining the Same
Method of Fabricating Contiguous Microlens Array
Method for Making Semiconductor Element Structure
Semiconductor Element Structure and Method for Making the Same
Method for Fabricating Semiconductor Structure
Method for Fabricating Semiconductor Structure and Structure of Static Random Access Memory
Gate Structure of Semiconductor Device
Diaphragm of Mems Electroacoustic Transducer
Diaphragm of Mems Electroacoustic Transducer
Mems Device with Protection Rings
Mems Structure with Metal Protection Rings
Method for Fabricating Mems Structure
Method for Fabricating Mems Device with Protection Rings
Semiconductor Structure, Pad Structure and Protection Structure
Semiconductor Structure with Gate Structure, Source/Drain Region and Recess Filling with Epitaxial Layer
Method of Manufacturing Complementary Metal Oxide Semiconductor Device
Method for Fabricating Semiconductor Device
Semiconductor Device Having Metal Gate and Manufacturing Method Thereof
Semiconductor Device Having Metal Gate and Manufacturing Method Thereof
Semiconductor Device Having Metal Gate and Manufacturing Method Thereof
Strained Silicon Structure
Strained Silicon Structure
Semiconductor Device
Semiconductor Device and Method of Fabricating the Same
Semiconductor Structure Having Material Layers Which Are Level with Each Other and Manufacturing Method Thereof
Metal Gate Structure and Fabrication Method Thereof
Metal Gate Structure and Fabrication Method Thereof
Method for Fabricating First and Second Epitaxial Cap Layers
Bond Pad Structure and Method of Manufacturing the Same
Bond Pad Structure with Dual Passivation Layers
Semiconductor Structure and Process Thereof
Semiconductor Process
Die Seal Ring and Method of Forming the Same
Semiconductor Device and Manufacturing Method of the Same
Manufacturing Method of Semiconductor Device
Method of Forming Self-Aligned Metal Gate Structure in a Replacement Gate Process Using Tapered Interlayer Dielectric
Shallow Trench Isolation Structures in Semiconductor Device and Method for Manufacturing the Same
Shallow Trench Isolation Structures in Semiconductor Device and Method for Manufacturing the Same
Method for Fabricating Interlayer Dielectric Layer
Interlayer Dielectric Layer with Two Tensile Dielectric Layers
Fin-Shaped Structure and Manufacturing Method Thereof
Method of Forming Fin-Shaped Structure Having Ladder-Shaped Cross-Sectional Profile
Method of Forming Fin-Shaped Structure
Method for Manufacturing Finfet Device
Patent:
9,123,659 →
Application:
14/516,554 →
Semiconductor Device and Method for Fabricating the Same
Patent:
9,263,392 →
Application:
14/529,129 →
Substrate of Semiconductor Device Including Epitaxial Layer and Silicon Layer Having Same Crystalline Orientation
Method for Fabricating Substrate of Semiconductor Device Including Epitaxial Layer and Silicon Layer Having Same Crystalline Orientation
Complementary Metal Oxide Semiconductor Device
Method of Forming Complementary Metal Oxide Semiconductor Device with Work Function Layer
Integrated Circuit Having Plural Transistors with Work Function Metal Gate Structures
Method of Forming Integrated Circuit Having Plural Transistors with Work Function Metal Gate Structures
High Voltage Metal-Oxide-Semiconductor Transistor Device and Method of Forming the Same
Method of Forming High Voltage Metal-Oxide-Semiconductor Transistor Device
Method for Planarizing Semiconductor Device
Semiconductor Device Having Fin Structure That Includes Dummy Fins
Semiconductor Device Having Fin Structure That Includes Dummy Fins
Method for Fabricating Semiconductor Device Having Fin Structure That Includes Dummy Fins
Finfet Transistor with Epitaxial Structures
Semiconductor Structure with a Multilayer Gate Oxide and Method of Fabricating the Same
Semiconductor Device and Method for Fabricating the Same
Method for Fabricating Semiconductor Device
Semiconductor Device Having Bilayer Metal Layer
Semiconductor Structure Having Gap Within Gate and Cap and Process Thereof
Semiconductor Having Isolated Gate Structure
Semiconductor Device
Metal Interconnect Structure and Method for Fabricating the Same
Semiconductor Device and Manufacturing Method of Conductive Structure in Semiconductor Device
Patent:
9,397,008 →
Application:
14/691,586 →
Semiconductor Device
Semiconductor Device and Method for Fabricating the Same
Patent:
9,431,239 →
Application:
14/809,278 →
Manufacturing Method of Semiconductor Structure
Semiconductor Structure and Manufacturing Method Thereof
Semiconductor Device and Method for Fabricating the Same
Semiconductor Device and Method for Fabricating the Same
Semiconductor Structure and Manufacturing Method Thereof
Patent:
9,543,211 →
Application:
14/864,881 →
Selectively Deposited Metal Gates and Method of Manufacturing Thereof
Patent:
9,496,361 →
Application:
14/869,987 →
Semiconductor Device and Method of Fabricating the Same
Patent:
9,466,727 →
Application:
14/925,984 →
Semiconductor Device and Manufacturing Method Thereof
Manufacturing Method of Semiconductor Device
Semiconductor Device and Manufacturing Method Thereof
Patent:
9,583,641 →
Application:
14/960,453 →
Semiconductor Structure and Fabrication Method Thereof
Semiconductor Device and Method for Fabricating the Same
Patent:
9,443,757 →
Application:
14/940,120 →
Method for Fabricating a Semiconductor Device
Patent:
9,530,871 →
Application:
15/225,836 →
Bottom-Up Epitaxy Growth on Air-Gap Buffer
Patent:
9,780,218 →
Application:
15/144,204 →
Bottom-Up Epitaxy Growth on Air-Gap Buffer
Semiconductor Structure and Method for Manufacturing the Same
Patent:
9,691,704 →
Application:
15/175,299 →
Method for Manufacturing Metal Interconnects
Patent:
9,779,989 →
Application:
15/168,095 →
Semiconductor Device Having Silicon-Germanium Layer on Fin and Method for Manufacturing the Same
Semiconductor Device Having Silicon-Germanium Layer on Fin and Method for Manufacturing the Same
Patent:
9,680,022 →
Application:
15/207,916 →
Bonded Semiconductor Structure and Method for Forming the Same
Patent:
9,691,733 →
Application:
15/221,609 →
Method of Fabricating Semiconductor Device
Patent:
9,685,385 →
Application:
15/226,929 →
Finfet Device on Silicon-on-Insulator and Method of Forming the Same
Patent:
9,793,174 →
Application:
15/270,000 →
Method of Fabricating Epitaxial Layer
Patent:
9,748,147 →
Application:
15/214,467 →
Method of Planarizing Substrate Surface
Patent:
9,773,682 →
Application:
15/201,628 →
Method of Planarizing Substrate Surface
Method of Planarizing Substrate Surface
Semiconductor Device and Method for Fabricating the Same
Method for Fabricating Contact Electrical Fuse
Semiconductor Device Including Barrier Layer and Manufacturing Method Thereof
Manufacturing Method of Semiconductor Device
Semiconductor Structure
Patent:
9,837,282 →
Application:
15/667,641 →
Method of Fabricating Semiconductor Structure
Patent:
9,761,460 →
Application:
15/365,967 →
Method for Forming Recess Within Epitaxial Layer
Semiconductor Device and Method for Fabricating the Same
Patent:
9,899,522 →
Application:
15/401,092 →
Semiconductor Device and Method for Fabricating the Same
Patent:
9,853,021 →
Application:
15/614,624 →
Semiconductor Device and Method for Fabricating the Same
Patent:
10,008,578 →
Application:
15/642,324 →
Method for Fabricating Semiconductor Device
Method of Fabricating Semiconductor Device
Patent:
10,043,718 →
Application:
15/672,325 →
Method of Fabricating a Semiconductor Device Having Contact Structures
Patent:
10,032,672 →
Application:
15/666,583 →
Semiconductor Device and Semiconductor Apparatus
Method of Forming a Fuse
Fuse-Structure
Fuse Structure
Bipolar Junction Transistor and Fabricating Method
Bipolar Junction Transistor and Fabricating Method
Bipolar Junction Transistor and Fabricating Method
Method of Fabricating Inductor and Structure Formed Therefrom
Semiconductor Memory Apparatus
Image Sensor Device and Manufacturing Method Thereof
Image Sensor Device and Manufacturing Method Thereof
High Voltage Device
Method for Forming High Voltage Device and Semiconductor Device
Stacked Alignment Mark and Method for Manufacturing Thereof
Method of Forming Interconnect Having Stacked Alignment Mark
Method of Reducing Charging Damage to Integrated Circuits During Semiconductor Manufacturing
Method of Reducing Charging Damage to Integrated Circuits During Semiconductor Manufacturing
Method of Reducing Charging Damage to Integrated Circuits During Semiconductor Manufacturing
Method of Reducing Charging Damage to Integrated Circuits During Semiconductor Manufacturing
Semiconductor Structure and Fabrication Thereof
Semiconductor Structure
Method of Manufacturing a Metal-Oxide-Semiconductor with Reduced On-Resistance
Metal-Oxide-Semiconductor Transistor and Method of Manufacturing the Same
Method for Fabricating a Transformer Integrated with a Semiconductor Structure
Method for Fabricating a Transformer Integrated with a Semiconductor Structure
Inductor Structure
Inductor Structure
Complementary Metal-Oxide-Semiconductor (Cmos) Image Sensor and Fabricating Method Thereof
Fabricating Method of Complementary Metal-Oxide-Semiconductor (Cmos) Image Sensor
Method for Fabricating Mos Transistors
Mos Transistor and Method for Fabricating the Same
Self-Alignment Insulation Structure
Method for Forming Self-Alignment Insulation Structure
Mems Device and Method of Making the Same
Contact Efuse Structure
Semiconductor Structure Having a Metal Gate with Side Wall Spacers
Semiconductor Structure Having a Metal Gate with Side Wall Spacers
Method for Fabricating Metal-Oxide Semiconductor Transistor
Metal-Oxide Semiconductor Transistor
Semiconductor Device Having Metal Gate and Manufacturing Method Thereof
Semiconductor Device Having Metal Gate and Manufacturing Method Thereof
Manufacturing Method for Dual Damascene Structure
Manufacturing Method for Dual Damascene Structure
Fin-FET and Method of Forming the Same
Fin-FET
High-Voltage Semiconductor Device
Lateral Diffused Metal-Oxide-Semiconductor Device
Semiconductor Structure and Fabrication Method Thereof
Resistor and Manufacturing Method Thereof
Bond Pad Structure and Fabricating Method Thereof
Back Side Illumination Image Sensor and Manufacturing Method Thereof
Semiconductor Device
Method for Fabricating Semiconductor Device
Method for Fabricating Semiconductor Device
Semiconductor Device Having Esd Device
Semiconductor Structure with Different Fins of Finfets
Method for Fabricating Finfets and Semiconductor Structure Fabricated Using the Method
Semiconductor Process
Semiconductor Devices
Non-Planar FET
Manufacturing Method of Non-Planar FET
Semiconductor Process
Semiconductor Structure and Process Thereof
Semiconductor Process
High Voltage Metal-Oxide-Semiconductor Transistor Device
Mos Transistor
Nonvolatile Memory Device and Fabricating Method Thereof
Semiconductor Process
Semiconductor Fin-Shaped Structure and Manufacturing Process Thereof
Patent:
8,802,521 →
Application:
13/909,101 →
High Voltage Metal-Oxide-Semiconductor Transistor Device and Manufacturing Method Thereof
Clock Skew Adjusting Method and Structure
Clock Skew Adjusting Structure
Manufacturing Method of Semiconductor Structure
Patent:
8,883,648 →
Application:
14/020,948 →
Semiconductor Device with Fine Conductive Pillar and Method of Manufacturing the Same
Method for Fabricating a Semiconductor Device by Forming and Removing a Dummy Gate Structure
Image Sensor
Patent:
9,343,493 →
Application:
14/612,306 →
Semiconductor Device and Method for Fabricating the Same
Semiconductor Device and Method for Fabricating the Same
Field-Effect Transistor and Method of Making the Same
Patent:
9,716,165 →
Application:
15/188,194 →
Field-Effect Transistor and Method of Making the Same
Field-Effect Transistor
Semiconductor Device and Method for Fabricating the Same
Semiconductor Device and Method for Fabricating the Same
Patent:
9,735,047 →
Application:
15/172,161 →
Triple Gate Device Having Strained-Silicon Channel
Patent:
6,888,181 →
Application:
10/708,694 →
Memory Device
Low-Voltage Differential Signal Driver with Pre-Emphasis Circuit
Mim Capacitor Structure and Fabricating Method Thereof
Mim Capacitor Structure and Fabricating Method Thereof
Interconnection Structure Used in a Pad Region of a Semiconductor Substrate
Structure of Capacitor Set
Method for Reducing Capacitance Variation Between Capacitors
Capacitor Structure
Method of Fabricating a Phase Change Memory and Phase Change Memory
Metal Gate Transistor and Resistor and Method for Fabricating the Same
Metal Gate Transistor and Resistor and Method for Fabricating the Same
Semiconductor Structure Formed by Double Patterning Technique
Semiconductor Structure and Method for Fabricating Semiconductor Layout
Manufacturing Method and Structure of Non-Volatile Memory
Non-Planar Semiconductor Structure and Fabrication Method Thereof
Non-Planar Semiconductor Structure
Semiconductor Structure
Patent:
8,558,346 →
Application:
13/532,786 →
Semiconductor Structure
Memory Device and Method for Driving Memory Array Thereof
Method for Fabricating Fin-Shaped Field-Effect Transistor
Patent:
8,765,546 →
Application:
13/925,812 →
Metal-Insulator-Metal Capacitor Structure and Method for Manufacturing the Same
Method of Manufacturing Non-Volatile Memory Having Sonos Memory Cells
Method for Fabricating Semiconductor Device
Semiconductor Device and Method for Fabricating the Same
Layout Pattern for Sram and Manufacturing Methods Thereof
Layout Pattern for Sram and Manufacturing Methods Thereof
Semiconductor Device
Semiconductor Device and Method for Fabricating the Same
Patent:
9,887,159 →
Application:
15/402,249 →
Method for Fabricating Semiconductor Structure
Semiconductor Structure with Inverted U-Shaped Cap Layer
Integrated Circuit and Manufacturing Method Thereof
Semiconductor Device and Method for Fabricating the Same
Patent:
10,211,314 →
Application:
15/790,043 →
Semiconductor Device and Method for Fabricating the Same
Method for Fabricating Single Diffusion Break Structure Directly Under a Gate Line
Patent:
10,256,155 →
Application:
15/893,709 →
Semiconductor Device and Method for Fabricating the Same
Patent:
10,332,981 →
Application:
15/943,657 →
Method for Fabricating Semiconductor Device
Method of Manufacturing a Mos Transistor
Semiconductor Mos Transistor Device and Method for Making the Same
Semiconductor Mos Transistor Device and Method for Making the Same
Semiconductor Mos Transistor Device and Method for Making the Same
Metal Gate Transistor and Method for Fabricating the Same
Metal Gate Transistor and Method for Fabricating the Same
Semiconductor Structure with Hard Mask Disposed on the Gate Structure
Manufacturing Method for Forming Semiconductor Structure
Sonos Device
Sonos Device and Method for Fabricating the Same
Metal Gate Structure
Method of fabricating metal gate structure
Patent:
9,209,273 →
Application:
14/463,677 →
Semiconductor Device and Method for Fabricating the Same
Patent:
9,583,600 →
Application:
14/877,950 →
Semiconductor Device and Method for Fabricating the Same
Semiconductor Layout Structure
Semiconductor Device and Method for Fabricating the Same
Patent:
9,953,880 →
Application:
15/660,991 →
Finfet Device Having Single Diffusion Break Structure
Patent:
10,141,228 →
Application:
15/917,859 →
Complementary Metal Oxide Semiconductor Device and Method of Forming the Same
Patent:
10,103,265 →
Application:
15/696,187 →
Metal Oxide Semiconductor Transistor
Method of Fabricating Metal Oxide Semiconductor Transistor
Through silicon via structure and method of fabricating the same
Through silicon via structure
Defect Detection Method
Image Sensor Device and Manufacturing Method Thereof
Automated Abnormal Machine Tracking and Notifying System and Method
Virtual Metrology System and Method
Virtual Metrology System and Method
Method for Removing Photoresist
Method for Removing Photoresist
Process of Metal Interconnects
Method for Forming Shallow Trench Isolation Structure
Patent:
6,913,978 →
Application:
10/788,183 →
Method of Removing Spacers and Fabricating Mos Transistor
Salicide Process
Salicide Process
Method for Fabricating Trench Isolation
Patent:
7,064,072 →
Application:
10/907,924 →
Semiconductor Cmos Transistors and Method of Manufacturing the Same
Reticle and Optical Proximity Correction Method
Method of Forming a Contact
Method of Forming Contact
Method of Forming Contact
Method for Fabricating Strained-Silicon Cmos Transistors
Method of Forming a Mos Transistor
Method of Forming a Mos Transistor
Frequency Generator Apparatus and Control Circuit Thereof
Mos Transistor and Manufacturing Methods Thereof
Method for Fabricating Field-Effect Transistor
Method for Fabricating P-Channel Field-Effect Transistor (Fet)
Method of Manufacturing Complementary Metal Oxide Semiconductor Transistors
Method of Forming Metal-Oxide-Semiconductor Transistor
Metal-Oxide-Semiconductor Transistor and Method of Forming the Same
Method of Generating a Gain of an Image Frame
Method of Fabricating Integrated Structure for Mems Device and Semiconductor Device
Integrated Structure for Mems Device and Semiconductor Device and Method of Fabricating the Same
Voltage Generating Apparatus
Semiconductor Process
Wafer Cleaning Device
Wafer Cleaning Device and Method Thereof
Strained-Silicon Transistor and Method of Making the Same
Method of Fabricating an Nmos Transistor
Polysilicon Layer and Method of Forming the Same
Method for Fabricating Field Effect Transistor with Fin Structure
Method for Fabricating Semiconductor Device
Patent:
8,318,579 →
Application:
13/308,618 →
Memory Device and Voltage Interpreting Method for Read Bit Line
Semiconductor Process
Semiconductor Process
Method for Generating Layout Pattern
Method for Generating Layout Pattern
Semiconductor Structure and Manufacturing Method Thereof
Manufacturing Method of Semiconductor Structure for Preventing Surface of Fin Structure from Damage and Providing Improved Process Window
Cleaning Process for Oxide
Method of Forming Fin Shape Structure Having Different Buffer Layers
Fin Shape Structure
Method of Forming a Semiconductor Structure
Gate-All-Around Nanowire Field-Effect Transistor Device
Patent:
9,530,841 →
Application:
14/960,442 →
Method for Forming Semiconductor Structure
Semiconductor Structure and Manufacturing Method Thereof
Method of Forming Multilayer Hard Mask with Treatment for Removing Impurities and Forming Dangling Bonds
Patent:
9,613,808 →
Application:
15/001,094 →
Semiconductor Memory Device Capable of Performing Read Operation and Write Operation Simultaneously
Semiconductor Memory Device Capable of Performing Read Operation and Write Operation Simultaneously
Patent:
9,633,712 →
Application:
15/131,034 →
Semiconductor Structure and Testing Method Using the Same
Alignment Mark Structure with Dummy Pattern
Method of Manufacturing Semiconductor Device for Reducing Grain Size of Polysilicon
Patent:
9,852,912 →
Application:
15/270,638 →
Semiconductor Substrate
Patent:
9,978,687 →
Application:
15/403,188 →
Mems Device Integrated with a Semiconductor Integrated Circuit and Manufacturing Method Thereof
Method for Fabricating Mems Device Integrated with a Semiconductor Integrated Circuit
Semiconductor Device and Method for Fabricating the Same
Semiconductor Device and Method for Fabricating the Same
Patent:
9,837,417 →
Application:
15/378,050 →
Semiconductor Device and Method for Fabricating the Same
Interconnect Structure and Fabricating Method Thereof
Die
Semiconductor Structure and Method for Reviewing Defects
Method for Reviewing Defects
Semiconductor Device and Method of Fabricating the Same
Semiconductor Device
Control Circuit for Generating Linear Term of Signals
Patent:
10,102,475 →
Application:
15/800,083 →
Control Circuit Used for Ternary Content-Addressable Memory with Two Logic Units
Patent:
10,366,756 →
Application:
16/104,946 →
Method of Fabricating Self-Aligned Contact
Self-Aligned Contact Set
Method for Forming an Opening
Color Filter Pattern and Manufacturing Method Thereof
Color Filter and Manufacturing Method Thereof
Semiconductor Device and Method for Fabricating the Same
Semiconductor Device and Method for Fabricating the Same
Fabricating Method of Fin Structure with Tensile Stress and Complementary Finfet Structure
Metal Interconnect Structure and Method for Fabricating the Same
Semiconductor Device and Manufacturing Method Thereof
Semiconductor Structure and Manufacturing Method Thereof
Patent:
10,461,200 →
Application:
16/054,938 →
Method for Improving Adhesion of a Low K Dielectric to a Barrier Layer
Fabricating Method of Fin Structure with Tensile Stress and Complementary Finfet Structure
Related Assignments
(9)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest
Nov 2, 2001
From: CHENG-NAN LIN
To: UNITED MICROELECTRONICS CORP.
Reel/Frame 012168/0988 →
Assignment of Assignor's Interest
Sep 11, 2003
From: LAI, CHIEN-HSIN; LIN, SAN-AN; YEN, KUO-EN; HUANG, KUO-UEI
To: UNITED MICROELECTRONICS CORP.
Reel/Frame 014485/0396 →
Assignment of Assignor's Interest
Oct 16, 2003
From: HUANG, CHIH-JEN
To: UNITED MICROELECTRONICS CORP.
Reel/Frame 014614/0559 →
Assignment of Assignor's Interest
Nov 12, 2003
From: CHENG, YA-LUN; CHIEN, CHIN-CHENG; YANG, NENG-HUI; CHEN, YU-KUN
To: UNITED MICROELECTRONICS CORP.
Reel/Frame 014694/0082 →
Assignment of Assignor's Interest
Nov 20, 2003
From: LIN, YUNG-CHANG; LIANG, CHIA-WEN; WANG, CHUAN-FU
To: UNITED MICROELECTRONICS CORP.
Reel/Frame 014740/0465 →
Assignment of Assignor's Interest
Jan 27, 2005
From: SILICON INTEGRATED SYSTEMS CORP.
To: UNITED MICROELECTRONICS CORP.
Reel/Frame 015621/0932 →
Assignment of Assignor's Interest
Aug 20, 2006
From: HUANG, JUI-TSEN
To: UNITED MICROELECTRONICS CORP.
Reel/Frame 018143/0119 →
Assignment of Assignor's Interest
Sep 26, 2006
From: HUANG, JUI-TSEN
To: UNITED MICROELECTRONICS CORP.
Reel/Frame 018299/0809 →
Assignment of Assignor's Interest
Apr 14, 2008
From: HUANG, JUI-TSEN
To: UNITED MICROELECTRONICS CORP.
Reel/Frame 020793/0465 →