Semiconductor device and method for fabricating the same
A semiconductor device includes: a substrate, a gate structure on the substrate, and a spacer adjacent to the gate structure, in which the spacer extends to a top surface of the gate structure, a top surface of the spacer includes a planar surface, the spacer encloses an air gap, and the spacer is composed of a single material. The gate structure includes a high-k dielectric layer, a work function metal layer, and a low resistance metal layer, in which the high-k dielectric layer is U-shaped. The semiconductor device also includes an interlayer dielectric (ILD) layer around the gate structure and a hard mask on the spacer, in which the top surface of the hard mask is even with the top surface of the ILD layer.
1. A method for fabricating semiconductor device, comprising:
providing a substrate;
forming a gate structure on the substrate and an interlayer dielectric (ILD layer around the gate structure; and
forming a first spacer enclosing an air gap adjacent to the gate structure and extending to and contacting a top surface of the gate structure, wherein the first spacer is composed of a single material and a top surface of the first spacer directly on top of the gate structure is lower than a top surface of the ILD layer.
2. The method of claim 1 , further comprising:
forming a dummy gate on the substrate;
forming a second spacer adjacent to the dummy gate;
forming an interlayer dielectric (ILD) layer around the second spacer;
transforming the dummy gate into the gate structure;
removing part of the gate structure;
removing the second spacer to form a recess adjacent to the gate structure; and
forming the first spacer in the recess.
3. The method of claim 2 , wherein the second spacer comprises silicon nitride.
4. The method of claim 2 , wherein the gate structure comprises a high-k dielectric layer, a work function metal layer, and a low resistance metal layer.
5. The method of claim 4 , wherein the high-k dielectric layer is U-shaped.
6. The method of claim 2 , wherein the step of forming the first spacer comprises:
forming a liner on a top surface and sidewalls of the ILD layer and a top surface and sidewalls of the gate structure; and
performing a trimming process to remove part of the liner for forming the first spacer enclosing the air gap.
7. The method of claim 6 , further comprising performing an atomic layer deposition (ALD) process to form the liner.
8. The method of claim 6 , further comprising performing a high-density plasma (HDP) deposition process to form the liner.
9. The method of claim 1 , further comprising forming a hard mask on the first spacer.
10. The method of claim 1 , wherein the first spacer comprises silicon dioxide.