IP Library Granted Patent US 9,875,928
Granted Patent B2
US 9,875,928 · App. 14/682,124 · Granted Jan 23, 2018

Metal interconnect structure and method for fabricating the same

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Quick Facts
Patent No.
US 9,875,928
App. No.
14/682,124
Granted
Jan 23, 2018
Kind
B2
Abstract

A method for fabricating metal interconnect structure is disclosed. The method includes the steps of: providing a substrate having a first inter-metal dielectric (IMD) layer thereon; forming a metal interconnection in the first IMD layer; removing part of the first IMD layer; forming a spacer adjacent to the metal interconnection; and using the spacer as mask to remove part of the first IMD layer for forming an opening in the first IMD layer.

Claims (18)

1. A metal interconnect structure, comprising:

a substrate having an inter-metal dielectric (IMD) layer thereon;

a metal interconnection in the IMD layer, wherein the metal interconnection comprises a trench conductor and a via conductor;

a spacer contacts a sidewall of the trench conductor of the metal interconnection and on and contacting the IMD layer directly;

an air gap in the IMD layer, wherein a topmost surface of the air gap is lower than a top surface of the IMD layer and a bottommost surface of the air gap is lower than a bottom surface of the trench conductor and the air gap is lower than a bottom surface of the spacer; and

a dielectric layer surrounding and contacting the air gap and on and contacting a top surface of the spacer directly while the top surfaces of the spacer and the trench conductor are coplanar.

2. The metal interconnect structure of claim 1 , wherein the top surface of the IMD layer is higher than the bottom surface of the trench conductor.

3. The metal interconnect structure of claim 1 , wherein the dielectric layer is disposed in the IMD layer and on the spacer and the metal interconnection.

4. The metal interconnect structure of claim 1 , wherein the dielectric layer comprises low-k dielectric material.

5. The metal interconnect structure of claim 1 , wherein the dielectric layer and the spacer comprise the same material.

6. The metal interconnect structure of claim 1 , wherein the dielectric layer is on top of the trench conductor.

7. A metal interconnect structure, comprising:

a substrate having an inter-metal dielectric (IMD) layer thereon;

a metal interconnection in the IMD layer, wherein the metal interconnection comprises a trench conductor and a via conductor;

an air gap in the IMD layer,

a first dielectric layer surrounding the air gap, wherein the top surfaces of the first dielectric layer and the IMD layer are coplanar; and

a second dielectric layer on the first dielectric layer, wherein the first dielectric layer and the second dielectric layer comprise different dielectric constant wherein the top surfaces of the second dielectric layer and the trench conductor are coplanar.

8. The metal interconnect structure of claim 7 , further comprising a stop layer under the IMD layer, wherein the bottom surfaces of the stop layer and the via conductor are coplanar and a bottommost surface of the air gap is above a top surface of the stop layer.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 26, 2021
From: UNITED MICROELECTRONICS CORPORATION
To: MARLIN SEMICONDUCTOR LIMITED
Reel/Frame 056991/0292 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 9, 2015
From: LIOU, EN-CHIUAN; TUNG, YU-CHENG; YANG, CHIH-WEI
To: UNITED MICROELECTRONICS CORP.
Reel/Frame 035392/0618 →