IP Library Granted Patent US 9,640,662
Granted Patent B2
US 9,640,662 · App. 15/350,113 · Granted May 2, 2017

Method for fabricating semiconductor device

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Quick Facts
Patent No.
US 9,640,662
App. No.
15/350,113
Granted
May 2, 2017
Kind
B2
Abstract

A method for fabricating semiconductor device includes the steps of: providing a substrate having at least one fin-shaped structure thereon, wherein the fin-shaped structure comprises a top portion and a bottom portion; removing part of the bottom portion of the fin-shaped structure; forming an epitaxial layer on the substrate to surround the bottom portion of the fin-shaped structure; transforming the bottom portion of the fin-shaped structure into the epitaxial layer; and removing part of the epitaxial layer.

Claims (22)

1. A method for fabricating semiconductor device, comprising:

providing a substrate having at least one fin-shaped structure thereon, wherein the fin-shaped structure comprises a top portion, a bottom portion, and a hard mask thereon;

forming a first shallow trench isolation (STI) around the fin-shaped structure;

using the hard mask to remove the first STI;

forming a spacer on the hard mask and adjacent to the top portion of the fin-shaped structure;

completely removing the first STI followed by removing part of the bottom portion of the fin-shaped structure;

forming an epitaxial layer on the substrate to surround the bottom portion of the fin-shaped structure;

transforming the bottom portion of the fin-shaped structure into the epitaxial layer; and

removing part of the epitaxial layer.

2. The method of claim 1 , further comprising:

removing the spacer after removing part of the epitaxial layer;

depositing an insulating layer on the substrate;

planarizing the insulating layer;

removing the hard mask; and

etching back the insulating layer for forming a second STI.

3. The method of claim 1 , wherein the hard mask and the spacer comprise silicon nitride.

4. The method of claim 1 , further comprising performing a thermal anneal process after forming the epitaxial layer to transform the bottom portion of the fin-shaped structure into the epitaxial layer.

5. The method of claim 1 , wherein the fin-shaped structure comprises silicon.

6. The method of claim 1 , further comprising transforming the entire bottom portion of the fin-shaped structure into the epitaxial layer.

7. The method of claim 1 , further comprising removing all of the epitaxial layer not covered by the top portion of the fin-shaped structure.

8. The method of claim 1 , wherein the epitaxial layer comprises silicon germanium.

9. The method of claim 8 , wherein the semiconductor device comprises a NMOS transistor.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 26, 2021
From: UNITED MICROELECTRONICS CORPORATION
To: MARLIN SEMICONDUCTOR LIMITED
Reel/Frame 056991/0292 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 14, 2016
From: LEE, HAO-MING
To: UNITED MICROELECTRONICS CORP.
Reel/Frame 040299/0651 →