IP Library Granted Patent US 9,105,660
Granted Patent B2
US 9,105,660 · App. 13/211,334 · Granted Aug 11, 2015

Fin-FET and method of forming the same

Inventors: Chen-Hua Tsai (Hsinchu County, TW); Rai-Min Huang (Taipei, TW); Sheng-Huei Dai (Taitung County, TW); Chun-Hsien Lin (Tainan, TW)
Assignee: UNITED MICROELECTRONICS CORP.
H01L29/66795H01L21/02647H01L21/2022H01L2029/7858
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Quick Facts
Patent No.
US 9,105,660
App. No.
13/211,334
Granted
Aug 11, 2015
Kind
B2
Abstract

A method of forming a Fin-FET is provided. A substrate is provided, then a mask layer is formed thereabove. A first trench is formed in the substrate and the mask layer. A semiconductor layer is formed in the first trench. Next, the mask layer is removed such that the semi-conductive layer becomes a fin structure embedded in the substrate and protruded above the substrate. Finally, a gate layer is formed on the fin structure.

Claims (27)

1. A method of forming a Fin-FET, comprising:

providing a substrate;

forming a mask layer on the substrate;

forming a first trench having an acute angle less than 30 degrees in the mask layer and the substrate;

forming a semiconductor layer in the first trench;

completely removing the mask layer such that the semiconductor layer becomes a fin structure embedded in the substrate and protruding from the substrate; and

forming a gate layer on the fin structure.

2. The method of forming a Fin-FET according to claim 1 , wherein after forming the semiconductor layer further comprises forming a STI to define an active region.

3. The method of forming a Fin-FET according to claim 2 , wherein the STI is formed before removing the mask layer.

4. The method of forming a Fin-FET according to claim 1 , wherein the step of forming the semiconductor layer comprises a selective epitaxial growth process.

5. The method of forming a Fin-FET according to claim 1 , wherein the step of forming the semiconductor layer comprises a cyclic thermal annealing process.

6. The method of forming a Fin-FET according to claim 1 , further comprising forming a material layer between the substrate and the mask layer.

7. The method of forming a Fin-FET according to claim 6 , wherein the material layer comprises SiO 2 .

8. The method of forming a Fin-FET according to claim 1 , wherein the semiconductor layer comprises a silicon layer, a germanium layer, a silicon-germanium layer or the combination thereof.

9. A method of forming a Fin-FET, comprising:

providing a substrate;

forming a mask layer on the substrate;

forming a first trench having a tapered angle less than 30 degrees in the mask layer and the substrate;

forming a semiconductor layer in the first trench;

forming a STI to define an active region, wherein the semiconductor layer is disposed in the active region;

after forming the STI, completely removing the mask layer such that the semiconductor layer becomes a fin structure embedded in the substrate and protruding from the substrate; and

forming a gate layer on the fin structure.

10. The method of forming a Fin-FET according to claim 9 , wherein the step of forming the semiconductor layer comprises a selective epitaxial growth process.

11. The method of forming a Fin-FET according to claim 9 , wherein the step of forming the semiconductor layer comprises a cyclic thermal annealing process.

12. The method of forming a Fin-FET according to claim 9 , further comprising forming a material layer between the substrate and the mask layer.

13. The method of forming a Fin-FET according to claim 12 , wherein the material layer comprises SiO 2 .

14. The method of forming a Fin-FET according to claim 9 , wherein the semiconductor layer comprises a silicon layer, a germanium layer, a silicon-germanium layer or the combination thereof.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 26, 2021
From: UNITED MICROELECTRONICS CORPORATION
To: MARLIN SEMICONDUCTOR LIMITED
Reel/Frame 056991/0292 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 17, 2011
From: TSAI, CHEN-HUA; HUANG, RAI-MIN; DAI, SHENG-HUEI; LIN, CHUN-HSIEN
To: UNITED MICROELECTRONICS CORP.
Reel/Frame 026761/0029 →
Continuity (1)
Related Publication 20130043506A1 · Feb 21, 2013