Field-effect transistor and method of making the same
A semiconductor device includes a semiconductor substrate, a gate structure formed over the semiconductor substrate, and an epitaxial structure formed partially within the semiconductor substrate. A vertically extending portion of the epitaxial structure extends vertically above a top surface of the semiconductor substrate in an area adjacent the gate structure. A laterally extending portion of the epitaxial structure extends laterally at an area below the top surface of the semiconductor substrate in a direction toward an area below the gate structure and beyond an area where the epitaxial structure extends vertically. The device further includes an interlayer dielectric layer between a side surface of the vertically extending portion of the epitaxial structure and a side surface of the gate structure. A top surface of the laterally extending portion of the epitaxial structure directly contacts the interlayer dielectric layer.
1. A semiconductor device, comprising:
a semiconductor substrate;
a gate structure formed over the semiconductor substrate;
an epitaxial structure, as one of a source or drain region corresponding to the gate structure, formed partially within the semiconductor substrate, a vertically extending portion of the epitaxial structure extending vertically above a top surface of the semiconductor substrate in an area adjacent the gate structure, a laterally extending portion of the epitaxial structure extending laterally at an area below the top surface of the semiconductor substrate in a direction toward an area below the gate structure and beyond an area where the epitaxial structure extends vertically;
an interlayer dielectric layer between a side surface of the vertically extending portion of the epitaxial structure and a side surface of the gate structure,
wherein a top surface of the laterally extending portion of the epitaxial structure directly contacts the interlayer dielectric layer.
2. The semiconductor device of claim 1 , wherein the gate structure includes:
a gate dielectric layer formed over the semiconductor substrate;
a gate electrode formed over the gate dielectric layer; and
a spacer formed on side surfaces of the gate dielectric layer and the gate electrode.
3. The semiconductor device of claim 2 , wherein the top surface of the laterally extending portion of the epitaxial structure further directly contacts the spacer of the gate structure.
4. The semiconductor device of claim 1 , wherein a lateral end of the laterally extending portion of the epitaxial structure includes a side surface that is nearly vertical.
5. The semiconductor device of claim 1 , wherein the epitaxial structure has a rounded corner where the vertically extending portion of the epitaxial structure joins the laterally extending portion of the epitaxial structure.
6. The semiconductor device of claim 1 , wherein the semiconductor substrate includes an Si substrate.
7. The semiconductor device of claim 6 , wherein the epitaxial structure includes an SiGe epitaxial layer.
8. The semiconductor device of claim 7 , wherein the SiGe epitaxial layer includes a buffer SiGe layer and a bulk SiGe layer formed over the buffer SiGe layer, the bulk SiGe layer having a higher Ge concentration than the buffer SiGe layer.
9. The semiconductor device of claim 8 , wherein the bulk SiGe layer contains about 45% Ge.
10. The semiconductor device of claim 7 , wherein the epitaxial structure further includes an Si cap layer formed over the SiGe epitaxial layer.
11. The semiconductor device of claim 1 , further comprising:
a metal contact formed through the interlayer dielectric layer and contacting the epitaxial structure.
12. An epitaxial structure formed partially within a semiconductor substrate, comprising:
a vertically extending portion extending vertically above a top surface of the semiconductor substrate;
a laterally extending portion extending laterally at an area below the top surface of the semiconductor substrate and beyond an area where the vertically extending portion extends vertically; and
a date structure comprising
a gate dielectric layer formed over the semiconductor substrate;
a gate electrode formed over the gate dielectric layer; and
a spacer formed on side surfaces of the gate dielectric layer and the gate electrode,
wherein
the vertically extending portion joins the laterally extending portion at a rounded corner;
the lateral end of the laterally extending portion is below the gate structure; and
the lateral end of the laterally extending portion is below the spacer.
13. The epitaxial structure of claim 12 , wherein a lateral end of the laterally extending portion includes a side surface that is nearly vertical.