Method for fabricating single diffusion break structure directly under a gate line
A method for fabricating semiconductor device includes the steps of: forming a first active region and a second active region extending along a first direction on a substrate; forming a first single diffusion break (SDB) structure extending along a second direction between the first active region and the second active region; and forming a first gate line extending along the second direction intersecting the first active region and the second active region. Preferably, the first SDB structure is directly under the first gate line between the first active region and the second active region.
1. A method for fabricating semiconductor device, comprising:
forming a first active region and a second active region extending along a first direction on a substrate;
forming a first single diffusion break (SDB) structure extending along a second direction between the first active region and the second active region, wherein an edge of the first SDB structure is aligned with and overlapping an edge of the first active region and an edge of the second active region; and
forming a first gate line extending along the second direction intersecting the first active region and the second active region, wherein the first SDB structure is directly under the first gate line between the first active region and the second active region.
2. The method of claim 1 , further comprising forming a shallow trench isolation (STI) around the first active region and the second active region.
3. The method of claim 2 , wherein the first SDB structure is disposed in the STI.
4. The method of claim 2 , wherein the first SDB structure and the STI comprise same material.
5. The method of claim 2 , wherein the first SDB structure and the STI comprise different material.
6. The method of claim 1 , wherein the first SDB structure extends from the first active region to the second active region.
7. The method of claim 1 , wherein the first SDB structure is disposed under the first gate line intersecting the first active region and the first gate line between the first active region and the second active region.
8. The method of claim 1 , wherein the first SDB structure is disposed under the first gate line intersecting the first active region, the first gate line between the first active region and the second active region, and the first gate line intersecting the second active region.
9. The method of claim 1 , further comprising forming a second gate line extending along the second direction adjacent to the first gate line.
10. The method of claim 9 , further comprising forming a second SDB structure directly under the second gate line and adjacent to the first active region.
11. A semiconductor device, comprising:
a first active region and a second active region extending along a first direction on a substrate;
a first single diffusion break (SDB) structure extending along a second direction between the first active region and the second active region, wherein an edge of the first SDB structure is aligned with and overlapping an edge of the first active region and an edge of the second active region; and
a first gate line extending along the second direction intersecting the first active region and the second active region, wherein the first SDB structure is directly under the first gate line between the first active region and the second active region.
12. The semiconductor device of claim 11 , further comprising a shallow trench isolation (STI) around the first active region and the second active region.
13. The semiconductor device of claim 12 , wherein the first SDB structure is disposed in the STI.
14. The semiconductor device of claim 12 , wherein the first SDB structure and the STI comprise same material.
15. The semiconductor device of claim 12 , wherein the first SDB structure and the STI comprise different material.
16. The semiconductor device of claim 11 , wherein the first SDB structure extends from the first active region to the second active region.
17. The semiconductor device of claim 11 , wherein the first SDB structure is disposed under the first gate line intersecting the first active region and the first gate line between the first active region and the second active region.
18. The semiconductor device of claim 11 , wherein the first SDB structure is disposed under the first gate line intersecting the first active region, the first gate line between the first active region and the second active region, and the first gate line intersecting the second active region.
19. The semiconductor device of claim 11 , further comprising a second gate line extending along the second direction adjacent to the first gate line.
20. The semiconductor device of claim 19 , further comprising a second SDB structure directly under the second gate line and adjacent to the first active region.