Semiconductor process

1. A semiconductor process, comprising:

providing a semiconductor substrate, wherein the semiconductor substrate has a fin-shaped structure and a patterned isolation layer and an opening of the patterned isolation layer exposes a silicon area which is the top surface of the fin-shaped structure;

forming a silicon rich layer on the sidewalls of the opening; and

performing an epitaxial process to form an epitaxial structure on the silicon area in the opening.

2. The semiconductor process according to claim 1 , wherein the epitaxial structure is formed by adhering to the silicon rich layer.

3. The semiconductor process according to claim 1 , wherein the patterned isolation layer comprises a shallow trench isolation structure.

4. The semiconductor process according to claim 1 , wherein the steps of forming the patterned isolation layer comprise:

forming a plurality of recesses in the semiconductor substrate;

forming a liner on the sidewalls of each of the recesses; and

filling an isolation material in each of the recesses.

5. The semiconductor process according to claim 1 , wherein the steps of forming the silicon rich layer comprise:

entirely forming a silicon rich film on the semiconductor substrate and on the sidewalls and the top surface of the patterned isolation layer; and

removing the silicon rich film on the semiconductor substrate and the top surface of the patterned isolation layer.

6. The semiconductor process according to claim 1 ,

wherein the epitaxial structure entirely covers the fin-shaped structure.

7. The semiconductor process according to claim 1 , wherein the epitaxial structure protrudes from the patterned isolation layer.

8. The semiconductor process according to claim 1 , wherein the top surface of the epitaxial structure is below the top surface of the patterned isolation layer.

9. The semiconductor process according to claim 1 , wherein the top surface of epitaxial structure is leveled with the top surface of the patterned isolation layer.

10. The semiconductor process according to claim 1 , wherein the epitaxial structure comprises a silicon-germanium epitaxial structure, a silicon carbide epitaxial structure and a silicon epitaxial structure.

11. The semiconductor process according to claim 1 , wherein the silicon content of the silicon rich layer is larger than one-third of the total content of the silicon rich layer.

12. The semiconductor process according to claim 11 , wherein the silicon rich layer comprises a nitrogen containing silicon rich layer.

13. The semiconductor process according to claim 12 , wherein the silicon rich layer comprises a silicon nitride (Si3N4) layer.

14. The semiconductor process according to claim 1 , further comprising:

etching back the patterned isolation layer enabling the epitaxial structure protruding from the patterned isolation layer after the epitaxial process is performed; and

forming a gate structure on parts of the fin-shaped structure.

15. The semiconductor process according to claim 14 , wherein the epitaxial structure is formed between the fin-shaped structure and the gate structure.

16. The semiconductor process according to claim 14 , wherein the epitaxial structure is formed on the fin-shaped structure other than the gate structure.

17. The semiconductor process according to claim 1 , further comprising:

etching back some areas of the patterned isolation layer enabling the fin-shaped structure protruding from some areas of the patterned isolation layer before the silicon rich layer is formed, so that at least a gate trench is formed in the patterned isolation layer; and

forming a gate structure in the gate trench and on the fin-shaped structure.

18. The semiconductor process according to claim 17 , wherein the epitaxial structure is formed on the fin-shaped structure other than the gate structure.