Semiconductor structure and manufacturing method thereof
A semiconductor structure is provided. The semiconductor structure includes a substrate, a plurality of first gate structures, a plurality of second gate structures, a first strained region, and a second strained region. The substrate has a first region and a second region. The first gate structures are disposed in the first region on the substrate. The second gate structures are disposed in the second region on the substrate. The first strained region is formed in the substrate and has a first distance from an adjacent first gate structure. The second strained region is formed in the substrate and has a second distance from an adjacent second gate structure, wherein the second distance is greater than the first distance.
1. A semiconductor structure, comprising:
a substrate having a first region and a second region;
a plurality of first gate structures disposed in the first region on the substrate, wherein a first spacer is disposed on a first sidewall of the plurality of first gate structures;
a plurality of second gate structures disposed in the second region on the substrate, a second spacer is disposed on a second sidewall of the plurality of second gate structure, wherein the first spacer and the second spacer are L-shape and are same in a stack structure from multiple layers;
a first strained region formed in the substrate and having a first distance from an adjacent first gate structure; and
a second strained region formed in the substrate and having a second distance from an adjacent second gate structure, wherein the second distance is greater than the first distance,
wherein sidewalls of the first strained region and the second strained region are substantially same geometric shape.
2. The semiconductor structure of claim 1 , wherein the first strained region and the second strained region both contain a recess in the substrate, and an epitaxial layer is in the recess.
3. The semiconductor structure of claim 2 , wherein a material of the epitaxial layer is SiGe.
4. The semiconductor structure of claim 1 , wherein the second distance is at least 1.5 times the first distance.
5. The semiconductor structure of claim 1 , wherein a thickness of the first spacer is the same as a thickness of the second spacer.
6. The semiconductor structure of claim 1 , wherein the first strained region and the second strained region are used to form source/drain regions with respect to the plurality of first gate structures and the plurality of second gate structures.
7. The semiconductor structure of claim 1 , wherein the first region is a core device region and the second region is an I/O device region.