Method of fabricating semiconductor structure

1. A method of fabricating a semiconductor structure, comprising:

providing a semiconductor substrate comprising a plurality of fin structures, wherein each of the fin structures is elongated in a first direction, and each of the fin structures is partly located in a first region of the semiconductor substrate and partly located in a second region of the semiconductor substrate, wherein the second region is located adjoining the first region;

performing a fin remove process for removing the fin structures in the second region; and

performing a fin cut process with a fin cut mask for cutting at least a part of the fin structures in the first region, wherein the fin cut mask comprises:

a plurality of cut patterns corresponding to a part of the fin structures in the first region; and

a compensation pattern corresponding to the second region of the semiconductor substrate, wherein a fin bump is formed in the second region and corresponding to the compensation pattern after the fin cut process and the fin remove process.

2. The method of fabricating the semiconductor structure according to claim 1 , wherein a process of forming the fin cut mask comprises:

inputting a fin cut layout pattern into a computer system, wherein the fin cut layout pattern comprises a plurality of slot patterns in a third region corresponding to the first region;

performing an optical proximity correction to the fin cut layout pattern for generating a corrected layout pattern comprising a correcting pattern in a fourth region corresponding to the second region, wherein the correcting pattern is generated in accordance with at least one of the slot patterns adjacent to the fourth region; and

outputting the corrected layout pattern to the fin cut mask, wherein the compensation pattern is defined by the correcting pattern.

3. The method of fabricating the semiconductor structure according to claim 1 , wherein the fin remove process comprises:

forming a first patterned mask layer on the semiconductor substrate, wherein the first pattern mask layer comprises a first opening exposing the fin structures in the second region; and

performing a first etching process with the first pattern mask layer as a mask for removing the fin structures in the second region.

4. The method of fabricating the semiconductor structure according to claim 3 , wherein the first patterned mask layer further comprises a second opening exposing a part of the fin structures in the first region, and the second opening is elongated in the first direction.

5. The method of fabricating the semiconductor structure according to claim 1 , wherein the fin cut process comprises:

forming a second patterned mask layer on the semiconductor substrate, wherein the second patterned mask layer is defined by the fin cut mask, and the second patterned mask layer comprises:

a plurality of third openings exposing a part of the fin structures in the first region; and

a dummy pattern in the second region, wherein the dummy pattern is defined by the compensation pattern in the fin cut mask; and

performing a second etching process with the second pattern mask layer as a mask for cutting a part of the fin structures in the first region.

6. The method of fabricating the semiconductor structure according to claim 5 , wherein each of the third openings is elongated in a second direction.

7. The method of fabricating the semiconductor structure according to claim 6 , wherein the dummy pattern is elongated in a second direction.

8. The method of fabricating the semiconductor structure according to claim 6 , wherein the second direction is orthogonal to the first direction.

9. The method of fabricating the semiconductor structure according to claim 5 , wherein the fin remove process is performed before the fin cut process.

10. The method of fabricating the semiconductor structure according to claim 9 , wherein a plurality of recessed fins are formed in the second region by the fin remove process, and the dummy pattern of the second patterned mask layer covers a part of the recessed fins during the second etching process.

11. The method of fabricating the semiconductor structure according to claim 10 , wherein the fin bump is formed by removing a part of the recessed fins which are not covered by the second patterned mask layer in the second etching process.

12. The method of fabricating the semiconductor structure according to claim 10 , wherein an area of the recessed fins covered by the dummy pattern is smaller than an area of the recessed fins which are not covered by the dummy pattern.

13. The method of fabricating the semiconductor structure according to claim 10 , further comprising:

forming a shallow trench isolation on the semiconductor substrate after the fin remove process and the fin cut process, wherein the shallow trench isolation covers the recessed fins and the fin bump.

14. The method of fabricating the semiconductor structure according to claim 5 , wherein the fin cut process is performed before the fin remove process.

15. The method of fabricating the semiconductor structure according to claim 14 , wherein the dummy pattern of the second patterned mask layer covers a part of the fin structures in the second region during the second etching process.

16. The method of fabricating the semiconductor structure according to claim 15 , wherein an area of the fin structures covered by the dummy pattern is smaller than an area of the fin structures in the second region without being covered by the dummy pattern.