Method of fabricating epitaxial layer
View Patent ↗A method of fabricating an epitaxial layer includes providing a silicon substrate. A dielectric layer covers the silicon substrate. A recess is formed in the silicon substrate and the dielectric layer. A selective epitaxial growth process and a non-selective epitaxial growth process are performed in sequence to respectively form a first epitaxial layer and a second epitaxial layer. The first epitaxial layer does not cover the top surface of the dielectric layer. The recess is filled by the first epitaxial layer and the second epitaxial layer. Finally, the first epitaxial layer and the second epitaxial layer are planarized.
1. A method of fabricating an epitaxial layer, comprising:
providing a silicon substrate comprising a dielectric layer disposed thereon;
forming a recess in the silicon substrate and the dielectric layer;
performing a selective epitaxial growth process to form a first epitaxial layer in the recess, wherein the first epitaxial layer does not cover a top surface of the dielectric layer and the first epitaxial layer is free from contacting the dielectric layer;
performing a non-selective epitaxial growth process to form a second epitaxial layer in the recess, and the second epitaxial layer covering the top surface of the dielectric layer, wherein the recess is only filled up by the first epitaxial layer and the second epitaxial layer; and
planarizing the second epitaxial layer to align the second epitaxial layer with the top surface of the dielectric layer.
2. The method of fabricating an epitaxial layer of claim 1 , wherein at least part of a top surface of the first epitaxial layer is lower than the top surface of the dielectric layer.
3. The method of fabricating an epitaxial layer of claim 1 , further comprising forming a doping region in the silicon substrate before forming the recess.
4. The method of fabricating an epitaxial layer of claim 3 , wherein the steps of forming the recess comprise removing part of the doping region.
5. The method of fabricating an epitaxial layer of claim 1 , further comprising after planarizing the first epitaxial layer and the second epitaxial layer, patterning the first epitaxial layer, the second epitaxial layer and the silicon substrate to form at least one fin structure.
6. The method of fabricating an epitaxial layer of claim 1 , wherein the first epitaxial layer comprises silicon germanium, silicon phosphide or silicon carbide.
7. The method of fabricating an epitaxial layer of claim 1 , wherein the second epitaxial layer comprises silicon germanium, silicon phosphide or silicon carbide.
8. The method of fabricating an epitaxial layer of claim 1 , wherein the dielectric layer comprises silicon nitride, silicon oxide or silicon oxynitride.
9. The method of fabricating an epitaxial layer of claim 1 , wherein during the selective epitaxial growth process, the first epitaxial layer only grows on the silicon substrate, and the first epitaxial layer does not grow on the dielectric layer.
10. The method of fabricating an epitaxial layer of claim 1 , wherein the dielectric layer contacts a top surface of the silicon substrate, and the top surface of the dielectric layer and the top surface of the silicon substrate are parallel.