Semiconductor device and method for fabricating the same
View Patent ↗A method for fabricating semiconductor device includes the steps of: forming a first fin-shaped structure on a substrate; forming a shallow trench isolation (STI) adjacent to the first fin-shaped structure; and forming a gate structure on the first fin-shaped structure and the STI. Preferably, the gate structure comprises a left portion and the right portion and the work functions in the left portion and the right portion are different.
1. A method for fabricating semiconductor device, comprising:
forming a first fin-shaped structure on a substrate;
forming a shallow trench isolation (STI) adjacent to the first fin-shaped structure; and
forming a gate structure on the first fin-shaped structure and the STI, wherein the gate structure comprises a left portion and the right portion and the work functions in the left portion and the right portion are different.
2. The method of claim 1 , further comprising forming a second fin-shaped structure adjacent to the first fin-shaped structure, wherein the STI is between the first fin-shaped structure and the second fin-shaped structure.
3. The method of claim 2 , further comprising forming a source region adjacent to one side of the gate structure in the first fin-shaped structure and a drain region in the second fin-shaped structure.
4. The method of claim 1 , further comprising a first well adjacent to one side of the gate structure and a second well adjacent to another side of the gate structure.
5. The method of claim 4 , wherein the first well and the second well comprise different conductive type.
6. The method of claim 4 , wherein a boundary between the first well and the second well is aligned with a boundary between the left portion and the right portion of the gate structure.
7. The method of claim 1 , further comprising forming a first spacer adjacent to the left portion on the first fin-shaped structure.
8. The method of claim 1 , further comprising forming a second spacer adjacent to the right portion on the STI.
9. A semiconductor device, comprising:
a first fin-shaped structure on a substrate;
a shallow trench isolation (STI) adjacent to the first fin-shaped structure; and
a gate structure on the first fin-shaped structure and the STI, wherein the gate structure comprises a left portion and the right portion and the work functions in the left portion and the right portion are different.
10. The semiconductor device of claim 9 , further comprising a second fin-shaped structure adjacent to the first fin-shaped structure, wherein the STI is between the first fin-shaped structure and the second fin-shaped structure.
11. The semiconductor device of claim 10 , further comprising a source region adjacent to one side of the gate structure in the first fin-shaped structure and a drain region in the second fin-shaped structure.
12. The semiconductor device of claim 9 , further comprising a first well adjacent to one side of the gate structure and a second well adjacent to another side of the gate structure.
13. The semiconductor device of claim 12 , wherein the first well and the second well comprise different conductive type.
14. The semiconductor device of claim 12 , wherein a boundary between the first well and the second well is aligned with a boundary between the left portion and the right portion of the gate structure.
15. The semiconductor device of claim 9 , further comprising a first spacer adjacent to the left portion on the first fin-shaped structure.
16. The semiconductor device of claim 9 , further comprising a second spacer adjacent to the right portion on the STI.