IP Library Granted Patent US 7,939,867
Granted Patent B2
US 7,939,867 · App. 12/038,360 · Granted May 10, 2011

Complementary metal-oxide-semiconductor (CMOS) image sensor and fabricating method thereof

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Quick Facts
Patent No.
US 7,939,867
App. No.
12/038,360
Granted
May 10, 2011
Kind
B2
Abstract

A method of fabricating a complementary metal-oxide-semiconductor (CMOS) image sensor is provided. First, an isolation structure is formed in a substrate with a photo-sensitive region and a transistor device region in the substrate. The transistor device region includes at least a region for forming a transfer transistor. A dielectric layer and a conductive layer are sequentially formed on the substrate. An ion implantation process is performed to implant a dopant into the substrate below the position for forming a gate of the transfer transistor and in the photo-sensitive region through the conductive layer and the dielectric layer. The conductive layer and the dielectric layer are patterned to at least form the gate structure of the transfer transistor on the transistor device region. Thereafter, a photo diode is formed in the substrate in the photo-sensitive region.

Claims (19)

1. A complementary metal-oxide-semiconductor image sensor (CIS), at least comprising:

a substrate;

an isolation structure, disposed in the substrate, for defining a photo-sensitive region and a transistor device region in the substrate;

a photo diode (PD), consisting of a first doping region and a second doping region and disposed in the photo-sensitive region;

a transfer transistor, disposed on the transistor device region, and adjoining to the PD;

a first protection layer of single doping layer structure and other than said first doping region and said second doping region, disposed in the substrate below the gate of the transfer transistor and in the photo-sensitive region, covering said photo diode (PD) and not being covered by said isolation structure.

2. The CIS as claimed in claim 1 , wherein a dopant of the first protection layer comprises B or P.

3. The CIS as claimed in claim 1 , wherein the isolation structure comprises a field oxide isolation structure or a shallow trench isolation structure.

4. A complementary metal-oxide-semiconductor image sensor (CIS), at least comprising:

a substrate;

an isolation structure, disposed in the substrate, for defining a photo-sensitive region and a transistor device region in the substrate;

a photo diode (PD), consisting of a first doping region and a second doping region and disposed in the photo-sensitive region;

a transfer transistor, disposed on the transistor device region, and adjoining to the PD; and

a first protection layer comprising a third doping region of a solely doping region and other than said first doping region and said second doping region, disposed in the substrate, below the gate of the transfer transistor, covering said photo diode (PD) and in the photo-sensitive region, wherein the third doping region and the second doping region are different in conductivity rather than concentration, and the third doping region and the second doping region are in direct contact with each other.

5. The CIS as claimed in claim 1 , further comprising a composite structure formed by sequentially stacking a first conductive layer, a first dielectric layer, and a second conductor, wherein the composite structure is disposed on the transistor device region.

6. The CIS as claimed in claim 1 , wherein the transistor device region further comprises a floating node doped region, and the CIS further comprises a second protection layer disposed in the substrate in the floating node doped region.

7. The CIS as claimed in claim 6 , wherein a dopant of the second protection layer comprises B or P.

8. The CIS as claimed in claim 7 , further comprising a third protection layer disposed in the substrate on periphery of the isolation structure adjoining to the photo-sensitive region.

9. The CIS as claimed in claim 8 , wherein a dopant of the third protection layer comprises B or P.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 26, 2021
From: UNITED MICROELECTRONICS CORPORATION
To: MARLIN SEMICONDUCTOR LIMITED
Reel/Frame 056991/0292 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 27, 2008
From: KAO, CHING-HUNG
To: UNITED MICROELECTRONICS CORP
Reel/Frame 020572/0873 →