IP Library Granted Patent US 9,559,189
Granted Patent B2
US 9,559,189 · App. 13/447,286 · Granted Jan 31, 2017

Non-planar FET

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Quick Facts
Patent No.
US 9,559,189
App. No.
13/447,286
Granted
Jan 31, 2017
Kind
B2
Abstract

The present invention provides a non-planar FET which includes a substrate, a fin structure, a gate and a gate dielectric layer. The fin structure is disposed on the substrate. The fin structure includes a first portion adjacent to the substrate wherein the first portion shrinks towards a side of the substrate. The gate is disposed on the fin structure. The gate dielectric layer is disposed between the fin structure and the gate. The present invention further provides a method of manufacturing the non-planar FET.

Claims (13)

1. A non-planar FET, comprising:

a substrate;

a fin structure disposed on the substrate, wherein the fin structure comprises an octagonal shape from end to end in the cross section parallel to a gate and a first part adjacent to the substrate wherein the first part shrinks toward a side of the substrate;

a shallow trench isolation disposed in the substrate and surrounding the fin structure, wherein a top surface of the shallow trench isolation is leveled with a bottom surface of the fin structure and a top surface of the substrate is higher than the top surface of the shallow trench isolation;

a source/drain region disposed in the fin structure;

the gate disposed on the fin structure, wherein the gate crosses the first part; and

a gate dielectric layer disposed between the gate and the fin structure.

2. The non-planar FET according to claim 1 , wherein the first part of the fin structure comprises a bottom surface and two sidewalls encompassing the bottom surface, wherein the bottom surface directly contacts the substrate.

3. The non-planar FET according to claim 1 , wherein the first part of the fin structure has a trapezoidal shape in the cross section.

4. The non-planar FET according to claim 1 , wherein the fin structure further comprises a second part disposed on the first part.

5. The non-planar FET according to claim 4 , wherein the second part of the fin structure has a trapezoidal shape and a rectangular shape in the cross section.

6. The non-planar FET according to claim 5 , wherein the trapezoidal part of the second part shrinks toward an opposite side of the substrate.

7. The non-planar FET according to claim 5 , wherein the gate crosses the second part.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 26, 2021
From: UNITED MICROELECTRONICS CORPORATION
To: MARLIN SEMICONDUCTOR LIMITED
Reel/Frame 056991/0292 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 16, 2012
From: CHIEN, CHIN-CHENG; WU, CHUN-YUAN; LIU, CHIH-CHIEN; LIN, CHIN-FU; HSU, CHIA-LIN
To: UNITED MICROELECTRONICS CORP.
Reel/Frame 028048/0197 →