IP Library Granted Patent US 10,177,231
Granted Patent B2
US 10,177,231 · App. 15/797,011 · Granted Jan 8, 2019

Semiconductor device and method for fabricating the same

Inventors: Chien-Hung Chen (Hsinchu County, TW); Shih-Hsien Huang (Kaohsiung, TW); Yu-Ru Yang (Hsinchu County, TW); Huai-Tzu Chiang (Tainan, TW); Hao-Ming Lee (Taichung, TW); Sheng-Hao Lin (Hsinchu County, TW); Cheng-Tzung Tsai (Taipei, TW); Chun-Yuan Wu (Yunlin County, TW)
Assignee: UNITED MICROELECTRONICS CORP.
H01L29/165H01L21/02532H01L21/02609H01L21/3065H01L21/30604H01L29/0657H01L29/1054H01L29/66795H01L29/785
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Quick Facts
Patent No.
US 10,177,231
App. No.
15/797,011
Granted
Jan 8, 2019
Kind
B2
Abstract

A semiconductor device comprises a semiconductor substrate and a semiconductor fin. The semiconductor substrate has an upper surface and a recess extending downwards into the semiconductor substrate from the upper surface. The semiconductor fin is disposed in the recess and extends upwards beyond the upper surface, wherein the semiconductor fin is directly in contact with semiconductor substrate, so as to form at least one semiconductor hetero-interface on a sidewall of the recess.

Claims (15)

1. A method for fabricating a semiconductor device, comprising:

providing a semiconductor substrate having an upper surface and a recess extending downwards into the semiconductor substrate from the upper surface; and

forming a semiconductor fin in the recess and extending upwards beyond the upper surface, wherein the semiconductor fin comprises a first material other than a material used to constitute the semiconductor substrate; the first material has a germanium (Ge) concentration gradually decreased varied from a bottom surface of the recess to the upper surface; and the semiconductor fin is directly in contact with semiconductor substrate, so as to form at least one semiconductor hetero-interface on a sidewall of the recess.

2. The method according to claim 1 , further comprises:

forming a sacrificing fin protruding from the upper surface of the semiconductor substrate;

forming a dielectric layer on the sacrificing fin;

performing a planarization process using the sacrificing fin as a stop layer; and

removing the sacrificing fin to form the trench and removing a portion of the semiconductor substrate exposed from the trench to form the recess.

3. The method according to claim 1 , wherein the process for forming the semiconductor fin comprises steps of depositing the first semiconductor material other than the material used to constitute the semiconductor substrate in the recess and the trench, so as to form the semiconductor hetero-interface with dislocation between two levels respectively parallel to a bottom of the recess surface and the upper surface.

4. The method according to claim 3 , further comprising steps of depositing a second semiconductor material on the first semiconductor material to fill the recess and the trench.

5. The method according to claim 3 , wherein the semiconductor substrate comprises silicon.

6. The method according to claim 2 , wherein the process for removing the sacrificing fin comprises steps of performing a dry etching on the sacrificing fin.

7. The method according to claim 2 , wherein the process for forming the recess comprises steps of performing an isotropic etching.

8. The method according to claim 2 , wherein the trench and the recess are formed by an identical etching process.

9. The method according to claim 2 , wherein the recess has a depth substantially ranging from 20 nm to 80 nm, and the semiconductor fin has an aspect ratio substantially ranging from 10 to 20.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 26, 2021
From: UNITED MICROELECTRONICS CORPORATION
To: MARLIN SEMICONDUCTOR LIMITED
Reel/Frame 056991/0292 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 30, 2017
From: CHEN, CHIEN-HUNG; HUANG, SHIH-HSIEN; YANG, YU-RU; CHIANG, HUAI-TZU; LEE, HAO-MING; LIN, SHENG-HAO; TSAI, CHENG-TZUNG; WU, CHUN-YUAN
To: UNITED MICROELECTRONICS CORP.
Reel/Frame 043979/0184 →
Priority Claims (1)
CN 2015 1 0644705 · Oct 8, 2015 · national
Continuity (2)
Division 14940867 · Nov 13, 2015
Related Publication 20180053826A1 · Feb 22, 2018