Semiconductor device having metal gate and manufacturing method thereof
View Patent ↗A method of manufacturing a semiconductor device having metal gate includes providing a substrate having at least a dummy gate, a sacrificial layer covering sidewalls of the dummy gate and a dielectric layer exposing a top of the dummy gate formed thereon, forming a sacrificial layer covering sidewalls of the dummy gate on the substrate, forming a dielectric layer exposing a top of the dummy gate on the substrate, performing a first etching process to remove a portion of the sacrificial layer surrounding the top of the dummy gate to form at least a first recess, and performing a second etching process to remove the dummy gate to form a second recess. The first recess and the second recess construct a T-shaped gate trench.
1. A semiconductor device having metal gate, comprising:
a substrate;
a high-K gate dielectric layer;
a T-shaped metal gate comprising:
a head portion; and
a body portion formed under the head portion for supporting the head portion;
a source/drain positioned in the substrate at two sides of the T-shaped metal gate;
lightly-doped drains respectively formed in the substrate at two sides of the T-shaped metal gate; and
a sacrificial layer formed at two sides of the T-shaped metal gate and at least formed under the head portion of the T-shaped metal gate, wherein the sacrificial layer covers the source/drain entirely, the sacrificial layer overlaps with the lightly-doped drains entirely but not physically contacts the lightly-doped drains.
2. The semiconductor device according to claim 1 , wherein the T-shaped metal gate further comprising a work function metal layer and a filling metal layer.
3. The semiconductor device according to claim 1 , wherein the sacrificial layer comprising an L-shaped sacrificial layer, and the L-shaped sacrificial layer further comprising:
an erection portion formed under the head portion of the T-shaped metal gate and perpendicular to the substrate; and
an extension portion formed on the substrate and parallel with the substrate.
4. The semiconductor device according to claim 3 , wherein the extension portion covers the source/drain entirely.
5. The semiconductor device according to claim 3 , wherein the L-shaped sacrificial layer comprises a strain stress layer or a contact etch stop layer (CESL).
6. A semiconductor device having metal gate, comprising:
a substrate;
a high-K gate dielectric layer;
a T-shaped metal gate comprising:
a head portion, wherein sidewalls of the head portion of the T-shaped metal gate is covered by the high-k gate dielectric layer; and
a body portion formed under the head portion for supporting the head portion;
a source/drain positioned in the substrate at two sides of the T-shaped metal gate; and
a sacrificial layer formed at two sides of the T-shaped metal gate and at least formed under the head portion of the T-shaped metal gate, wherein the sacrificial layer is formed not covering the source/drain.
7. The semiconductor device according to claim 6 , wherein the sacrificial layer comprises a spacer.