Strained silicon structure
View Patent ↗A strained silicon substrate structure includes a first transistor and a second transistor disposed on a substrate. The first transistor includes a first gate structure and two first source/drain regions disposed at two sides of the first gate structure. A first source/drain to gate distance is between each first source/drain region and the first gate structure. The second transistor includes a second gate structure and two source/drain doped regions disposed at two side of the second gate structure. A second source/drain to gate distance is between each second source/drain region and the second gate structure. The first source/drain to gate distance is smaller than the second source/drain to gate distance.
1. A strained silicon structure comprising:
a substrate having a top surface, wherein the substrate is defined into a low density region and a high density region;
a first transistor disposed on the top surface and within the low density region; and
a second transistor disposed on the top surface and within the high density region, wherein a cross-sectional profile of a first source/drain region of the first transistor is different from a cross-sectional profile of a second source/drain region of the second transistor, wherein the first transistor and the second transistor have a same conductivity type and wherein the first source/drain region comprises a first recess disposed in the substrate and a first epitaxial layer filling the first recess, the second source/drain region comprises a second recess disposed in the substrate and a second epitaxial layer filling the second recess.
2. The strained silicon structure of claim 1 , wherein the first transistor comprises:
a first gate structure disposed on the top surface;
the first source/drain region disposed in the substrate at one side of the first gate structure, wherein the first source/drain region is stressed; and
a first channel disposed in the substrate beneath the first gate structure.
3. The strained silicon structure of claim 2 , wherein the second transistor comprises:
a second gate structure disposed on the top surface;
the second source/drain region disposed in the substrate at one side of the second gate structure, wherein the second source/drain region is stressed; and
a second channel disposed in the substrate beneath the second gate structure.
4. The strained silicon structure of claim 1 , wherein the cross-sectional profile of the first source/drain region comprises a diamond-like shape, an octagon, or a U shape.
5. The strained silicon structure of claim 1 , wherein the cross-sectional profile of the second source/drain region comprises a diamond-like shape, an octagon, or a U shape.
6. A strained silicon structure comprising:
a substrate having a top surface, wherein the substrate is defined into a low density region and a high density region;
a first transistor disposed on the top surface and within the low density region; and
a second transistor disposed on the top surface and within the high density region, wherein a cross-sectional profile of a first source/drain region of the first transistor is different from a cross-sectional profile of a second source/drain region of the second transistor;
a first epitaxial layer disposed within the first source/drain region; and
a second epitaxial layer disposed within the second source/drain region, wherein the first epitaxial layer and the second epitaxial have a same composition.
7. The strained silicon structure of claim 6 , wherein the first transistor comprises:
a first gate structure disposed on the top surface;
the first source/drain region disposed in the substrate at one side of the first gate structure, wherein the first source/drain region is stressed; and
a first channel disposed in the substrate beneath the first gate structure.
8. The strained silicon structure of claim 7 , wherein the second transistor comprises:
a second gate structure disposed on the top surface;
the second source/drain region disposed in the substrate at one side of the second gate structure, wherein the second source/drain region is stressed; and
a second channel disposed in the substrate beneath the second gate structure.
9. The strained silicon structure of claim 8 , wherein the first source/drain region further comprises:
a first recess disposed in the substrate at one side of the substrate and the first epitaxial layer filling the first recess.
10. The strained silicon structure of claim 9 , wherein the second source/drain region further comprises:
a second recess disposed in the substrate at one side of the substrate and the second epitaxial layer filling the second recess.
11. The strained silicon structure of claim 10 , wherein the cross-sectional profile of each of the first source/drain regions comprises a diamond-like shape, an octagon, or a U shape, and the cross-sectional profile of each of the second source/drain regions comprises a diamond-like shape, an octagon, or a U shape.
12. The strained silicon structure of claim 6 , wherein the cross-sectional profile of the first source/drain region comprises a diamond-like shape, an octagon, or a U shape.
13. The strained silicon structure of claim 6 , wherein the cross-sectional profile of the second source/drain region comprises a diamond-like shape, an octagon, or a U shape.
14. A strained silicon structure comprising:
a substrate;
at least two first transistors disposed on the substrate, and each of the first transistors having a first gate structure; and
at least two second transistors disposed on the substrate, and each of the second transistors having a second gate structure, wherein a first shortest distance between the first gate structures is larger than a second shortest distance between the second gate structures, and a cross-sectional profile of a first source/drain region of each of the first transistors is different from a cross-sectional profile of a second source/drain region of each of the second transistors.
15. The strained silicon structure of claim 14 , wherein each of the first source/drain regions is disposed in the substrate besides one of the first gate structures, each of the first source/drain regions is stressed and a first channel is disposed in the substrate beneath each of the first gate structures.
16. The strained silicon structure of claim 14 , wherein each of the second source/drain regions is disposed in the substrate beside one of the second gate structures, each of the second source/drain regions is stressed and a second channel is disposed in the substrate beneath each of the second gate structures.
17. The strained silicon structure of claim 14 , wherein each of the first source/drain regions comprises:
a first recess disposed in the substrate; and
a first epitaxial layer filling the first recess.
18. The strained silicon structure of claim 14 , wherein each of the second source/drain regions comprises:
a second recess disposed in the substrate; and
a second epitaxial layer filling the second recess.