Semiconductor device and method for fabricating the same
A semiconductor device includes a gate structure on a substrate, an offset spacer adjacent to the gate structure, a main spacer around the offset spacer, a source/drain region adjacent to two sides of the main spacer, a contact etch stop layer (CESL) adjacent to the main spacer, and an interlayer dielectric (ILD) layer around the CESL. Preferably, a dielectric constant of the offset spacer is higher than a dielectric constant of the main spacer.
1. A semiconductor device, comprising:
a gate structure on a substrate;
an offset spacer adjacent to and in direct contact with the gate structure;
a main spacer around the offset spacer, wherein a dielectric constant of the offset spacer is higher than a dielectric constant of the main spacer; and
a source/drain region adjacent to two sides of the main spacer.
2. The semiconductor device of claim 1 , further comprising:
a contact etch stop layer (CESL) adjacent to the main spacer; and
an interlayer dielectric (ILD) layer around the CESL.
3. The semiconductor device of claim 2 , wherein an oxygen concentration in the CESL and an oxygen concentration in the ILD layer are different.
4. The semiconductor device of claim 2 , wherein an oxygen concentration in the ILD layer is greater than an oxygen concentration in the CESL.
5. The semiconductor device of claim 2 , wherein an oxygen concentration on a surface of the CESL is greater than an oxygen concentration inside the CESL.
6. The semiconductor device of claim 2 , wherein the CESL and the ILD layer comprise same dielectric constant.
7. The semiconductor device of claim 2 , wherein the main spacer, the CESL and the ILD layer comprise same dielectric constant.
8. The semiconductor device of claim 2 , wherein a dielectric constant of the offset spacer is higher than a dielectric constant of the CESL.
9. The semiconductor device of claim 1 , wherein the offset spacer is made of SiCN and the main spacer is made of SiOCN.