IP Library Granted Patent US 9,406,772
Granted Patent B1
US 9,406,772 · App. 14/609,446 · Granted Aug 2, 2016

Semiconductor structure with a multilayer gate oxide and method of fabricating the same

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Quick Facts
Patent No.
US 9,406,772
App. No.
14/609,446
Granted
Aug 2, 2016
Kind
B1
Abstract

A semiconductor structure with a multilayer gate oxide is provided. The structure includes a substrate. A multilayer gate oxide is disposed on the substrate, wherein the multilayer gate oxide includes a first gate oxide and a second gate oxide. The first gate oxide contacts the substrate and the second gate oxide is disposed on and contacts the first gate oxide. The second gate oxide is hydrophilic. The first gate oxide is formed by a thermal oxidation process. The second gate oxide is formed by a chemical treatment.

Claims (16)

1. A semiconductor structure with a multilayer gate oxide, comprising:

a substrate;

a multilayer gate oxide disposed on the substrate, wherein the multilayer gate oxide comprises:

a first gate oxide contacting the substrate; and

a second gate oxide disposed on and contacting the first gate oxide, wherein the second gate oxide is hydrophilic and the second gate oxide is silicon oxide.

2. The semiconductor structure with a multilayer gate oxide of claim 1 , wherein a first thickness of the first gate oxide is greater than a second thickness of the second gate oxide.

3. The semiconductor structure with a multilayer gate oxide of claim 2 , wherein the ratio of the first thickness to the second thickness is not smaller than 3/2.

4. The semiconductor structure with a multilayer gate oxide of claim 1 , wherein the first gate oxide has a chemical formula of Si A O B , the second gate oxide has a chemical formula of Si X O Y , and the ratio of B to A is greater than the ratio of Y to X.

5. The semiconductor structure with a multilayer gate oxide of claim 1 , further comprising a high-K material disposed on and contacting the second oxide layer.

6. The semiconductor structure with a multilayer gate oxide of claim 5 , further comprising a metal filling layer disposed on the high-K material.

7. A semiconductor structure with a multilayer gate oxide, comprising:

a substrate;

a multilayer gate oxide disposed on the substrate, wherein the multilayer gate oxide comprises:

a first gate oxide contacting the substrate;

a second gate oxide disposed on and contacting the first gate oxide, wherein the second gate oxide is hydrophilic; and

a high-K material disposed on and contacting the second oxide layer.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 26, 2021
From: UNITED MICROELECTRONICS CORPORATION
To: MARLIN SEMICONDUCTOR LIMITED
Reel/Frame 056991/0292 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 30, 2015
From: WANG, SHAO-WEI; YEH, SHU-MING; HSIAO, YU-TUNG
To: UNITED MICROELECTRONICS CORP.
Reel/Frame 034849/0423 →