Integrated circuit structure and manufacturing method thereof

1. An integrated circuit structure, comprising:

a dielectric layer;

a conductive structure, disposed in the dielectric layer and having a recess portion;

a low-k dielectric layer, disposed on the dielectric layer;

a dual damascene structure having a wire and a plug, disposed in the low-k dielectric layer; and

a protruding bonding portion connected to the bottom of the plug, wherein the bonding portion is extended into the dielectric layer and connected to the recess portion of the conductive structure wherein the recess portion surrounds a portion of the conductive structure.

2. The integrated circuit structure according to claim 1 , wherein the lateral dimension of the plug is greater than the lateral dimension of the recess portion.

3. The integrated circuit structure according to claim 1 , wherein the bonding portion of the plug is extended into the recess portion of the conductive structure.

4. The integrated circuit structure according to claim 1 , wherein the conductive structure is a ring-like structure and the recess portion extends through the conductive structure to form a hollow portion.

5. The integrated circuit structure according to claim 4 , wherein the lateral dimension of the plug is greater than the lateral dimension of the hollow portion.

6. The integrated circuit structure according to claim 1 , wherein material of the plug comprises copper, tungsten or an alloy of the two.

7. The integrated circuit structure according to claim 1 , wherein material of the conductive structure comprises copper, aluminum or an alloy of the two.

8. The integrated circuit structure according to claim 1 , further comprising an insulation layer disposed between the dielectric layer and the low-k dielectric layer.

9. A method of manufacturing an integrated circuit structure, comprising:

providing a dielectric layer;

forming a conductive structure in the dielectric layer, wherein the conductive structure has a recess portion;

forming a low-k dielectric layer on the dielectric layer and in the recess of the conductive structure;

forming an opening in the low-k dielectric layer, wherein the opening communicates with the recess portion of the conductive structure and exposes a portion of the conductive structure; and

forming a dual damascene structure having a wire and a plug in the opening, wherein a bonding portion on the bottom of the plug is extended into the recess portion and connected to the conductive structure wherein the plug directly contacts the conductive structure.

10. The method according to claim 9 , wherein the lateral dimension of the plug is greater than the lateral dimension of the recess portion.

11. The method according to claim 9 , wherein the bonding portion of the plug is extended into the recess portion of the conductive structure.

12. The method according to claim 9 , wherein the conductive structure is a ring-like structure and the recess portion extends through the conductive structure to form a hollow portion.

13. The method according to claim 12 , wherein a method of forming the conductive structure comprises:

forming a patterned photoresist layer on the dielectric layer;

using the patterned photoresist layer as a mask to form a ring-like opening;

removing the patterned photoresist layer; and

filling the ring-like opening with a conductive material.

14. The method according to claim 13 , wherein the conductive material comprises copper or an alloy of copper.

15. The method according to claim 9 , wherein a method of forming the conductive structure comprises:

forming a conductive layer in the dielectric layer; and

removing a portion of the conductive layer so as to form the recess portion on a surface of the conductive layer.

16. The method according to claim 9 , further comprising forming an insulation layer on the dielectric layer after forming the conductive structure but before forming the low-k dielectric layer.

17. The method according to claim 9 , wherein a method of forming the low-k dielectric layer comprises performing a spin-coating process.