IP Library Granted Patent US 9,461,150
Granted Patent B2
US 9,461,150 · App. 14/979,594 · Granted Oct 4, 2016

Method for fabricating semiconductor device with fin-shaped structure

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Quick Facts
Patent No.
US 9,461,150
App. No.
14/979,594
Granted
Oct 4, 2016
Kind
B2
Abstract

A method for fabricating semiconductor device with fin-shaped structure is disclosed. The method includes the steps of: forming a fin-shaped structure on a substrate; forming a first dielectric layer on the substrate and the fin-shaped structure; depositing a second dielectric layer on the first dielectric layer; etching back a portion of the second dielectric layer; removing part of the first dielectric layer to expose a top surface and part of the sidewall of the fin-shaped structure; forming an epitaxial layer to cover the exposed top surface and part of the sidewall of the fin-shaped structure; and removing a portion of the second dielectric layer.

Claims (18)

1. A method for fabricating semiconductor device with fin-shaped structure, comprising:

forming a fin-shaped structure on a substrate;

forming a first dielectric layer on the substrate and the fin-shaped structure;

depositing a second dielectric layer on the first dielectric layer;

etching back a portion of the second dielectric layer;

removing part of the first dielectric layer to expose a top surface and part of the sidewall of the fin-shaped structure;

forming an epitaxial layer to cover the exposed top surface and part of the sidewall of the fin-shaped structure;

planarizing the epitaxial layer before removing a portion of the second dielectric layer; and

removing a portion of the second dielectric layer.

2. The method of claim 1 , further comprising performing an atomic layer deposition (ALD) process for forming the first dielectric layer.

3. The method of claim 1 , further comprising etching back a portion of the second dielectric layer so that a top surface of the second dielectric layer is even with a top surface of first dielectric layer.

4. The method of claim 1 , wherein the first dielectric layer comprises an oxide layer.

5. The method of claim 1 , wherein the second dielectric layer comprises an Advanced Patterning Film (APF).

6. The method of claim 1 , wherein the epitaxial layer comprises a silicon germanium layer.

7. The method of claim 1 , wherein the fin-shaped structure comprises silicon germanium.

8. The method of claim 1 , wherein the fin-shaped structure and the epitaxial layer comprises a linear gradient of germanium concentration therebetween.

9. The method of claim 1 , wherein a concentration of germanium increases linearly from the fin-shaped structure toward the epitaxial layer.

10. The method of claim 1 , wherein a concentration of germanium increases linearly from the epitaxial layer toward the fin-shaped structure.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 26, 2021
From: UNITED MICROELECTRONICS CORPORATION
To: MARLIN SEMICONDUCTOR LIMITED
Reel/Frame 056991/0292 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 28, 2015
From: CHIEN, CHIN-CHENG; HSU, HSIN-KUO; LIU, CHIH-CHIEN; LIN, CHIN-FU; WU, CHUN-YUAN
To: UNITED MICROELECTRONICS CORP.
Reel/Frame 037370/0612 →