IP Library Granted Patent US 8,525,354
Granted Patent B2
US 8,525,354 · App. 13/272,289 · Granted Sep 3, 2013

Bond pad structure and fabricating method thereof

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,525,354
App. No.
13/272,289
Granted
Sep 3, 2013
Kind
B2
Abstract

A bond pad structure comprises an interconnection structure and an isolation layer. The dielectric layer has an opening and a metal pad. The isolation layer is disposed on the interconnection structure and extends into the opening until it is in contact with the metal pad, whereby the sidewalls of the opening is blanketed by the isolation layer, and a portion of the metal pad is exposed from the opening.

Claims (38)

1. A bond pad structure, comprising:

an interconnection structure, having an opening and a metal pad;

a metal oxide layer formed on a surface of the metal pad and disposed at the same side of the opening but not being exposed from the opening; and

an isolation layer, disposed on the interconnection structure and extending into the opening until in contact with the metal pad, whereby sidewalls of the opening are blanketed by the isolation layer, and a portion of the metal pad is exposed from the opening.

2. The bond pad structure of claim 1 , wherein the isolation layer is made of a material selected from a group consisting of aluminum oxide (Al 2 O 3 ), silicon nitride (SiN), silicon carbonitride (SiCN), amorphous silicon, organic polymer and the arbitrary combinations thereof.

3. The bond pad structure of claim 1 , wherein the interconnection structure comprises:

an inter-layer dielectric (ILD), used to carry the metal pad; and

a passivation layer, disposed on the ILD, wherein the opening penetrates through the passivation layer to expose a portion of the metal pad.

4. The bond pad structure of claim 1 , further comprising a silicon oxide layer embedded between the hard mask layer and the isolation layer.

5. The bond pad structure of claim 1 , wherein the isolation layer has a bending angle formed on the corner where the sidewalls of the opening adjoins to the metal pad.

6. The bond pad structure of claim 1 , further comprising a hard mask layer disposed on the isolation layer without in contact with the metal pad.

7. The bond pad structure of claim 6 , wherein the hard mask layer is an aluminum layer.

8. A micro-electro-mechanical systems (MEMS) device, comprising:

a substrate;

a transistor, formed on the substrate;

a micro-electromechanical element, formed on the substrate; and

a bond pad structure, comprising:

an interconnection structure, formed on the substrate and having an opening and a metal pad electrically connected to the transistor and the micro-electromechanical element;

a metal oxide layer formed on the surface of the metal pad and disposed at the same side of the opening but not being exposed from the opening; and

an isolation layer disposed on the interconnection structure and extending into the opening until in contact with the metal pad, whereby the sidewalls of the opening are blanketed by the isolation layer, and a portion of the metal pad is exposed from the opening.

9. The MEMS device of claim 8 , further comprising a hard mask layer formed on the isolation layer without in contact with the metal pad.

10. The MEMS device of claim 8 , wherein the isolation layer has a bending angle formed on a corner where the sidewalls of the opening adjoin the metal pad.

11. The MEMS device of claim 8 , further comprising a silicon oxide layer embedded between the hard mask layer and the isolation layer.

12. A method for fabricating a bond pad structure, comprising:

providing a substrate;

forming pluralities of patterned metal layers;

forming an inter-layer dielectric (ILD) to isolate the patterned metal layers on the substrate, so as to form at least one metal pad;

forming a metal oxide layer on the metal pad;

forming a passivation layer over the patterned metal layers and the ILD;

forming an opening in the passivation layer so as to expose a portion of the metal pad;

forming an isolation layer on the passivation layer to cover the sidewalls of the opening and the exposed metal pad; and

patterning the isolation layer to expose a portion of the metal pad from the opening.

13. The method of claim 12 , further comprising steps of forming at least one transistor and a micro-electromechanical element prior to the formation of the interconnection structure.

14. The method of claim 12 , wherein the isolation layer is made of a material selected from a group consisting of Al 2 O 3 , SiN, SiCN, amorphous silicon, organic polymer and the arbitrary combinations thereof.

15. The method of claim 12 , further comprising steps of forming a hard mask layer on the isolation layer without in contact with the metal pad.

16. The method of claim 15 , further comprising steps of:

forming a silicon oxide layer on the isolation layer prior to the formation of the hard mask; and

patterning the silicon oxide layer to make the patterned silicon oxide layer without beyond the opening.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 26, 2021
From: UNITED MICROELECTRONICS CORPORATION
To: MARLIN SEMICONDUCTOR LIMITED
Reel/Frame 056991/0292 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 13, 2011
From: WU, HUI-MIN; WANG, MING-I; WANG, KUAN-YU; HSIEH, KUN-CHE; HUANG, CHIEN-HSIN
To: UNITED MICROELECTRONICS CORPORATION
Reel/Frame 027053/0700 →