IP Library Granted Patent US 8,324,712
Granted Patent B2
US 8,324,712 · App. 13/342,106 · Granted Dec 4, 2012

Metal capacitor and method of making the same including dielectric layer of different mechanical strength regions

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Quick Facts
Patent No.
US 8,324,712
App. No.
13/342,106
Granted
Dec 4, 2012
Kind
B2
Abstract

A metal capacitor structure is disclosed. The metal capacitor structure includes: a dielectric layer having a first region and a second region, a dielectric constant of the dielectric layer in the second region being higher than a dielectric constant of the dielectric layer in the first region; a dual damascene metal interconnection positioned in the first region; and a damascene capacitor electrode positioned in the second region.

Claims (10)

1. A metal capacitor structure comprising:

a dielectric layer having a first region, a second region, and a third region, wherein mechanical strength of the third region of the dielectric layer is greater than mechanical strength of the first region of the dielectric layer, and a dielectric constant of the dielectric layer in the second region being higher than a dielectric constant of the dielectric layer in the first region;

a dual damascene metal interconnection positioned in the first region; and

a damascene capacitor electrode positioned in the second region.

2. The metal capacitor structure of claim 1 , wherein the third region comprises a non-critical region.

3. The metal capacitor structure of claim 1 , wherein a cap layer is positioned on the dual damascene metal interconnection.

4. The metal capacitor structure of claim 1 , wherein the damascene capacitor electrode and the dielectric layer in the second region constitute a metal-oxide-metal (MOM) capacitor.

5. The metal capacitor structure of claim 1 , wherein the third region is a peripheral circuit region.

6. The metal capacitor structure of claim 1 , wherein the third region is a logic IC region.

7. The metal capacitor structure of claim 1 , wherein the third region is an iso-region with isolated patterns.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 26, 2021
From: UNITED MICROELECTRONICS CORPORATION
To: MARLIN SEMICONDUCTOR LIMITED
Reel/Frame 056991/0292 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 1, 2012
From: YANG, CHIN-SHENG
To: UNITED MICROELECTRONICS CORP.
Reel/Frame 027467/0342 →