Method for fabricating MEMS device integrated with a semiconductor integrated circuit

1. A method for fabricating a semiconductor device, comprising:

providing a semiconductor substrate comprising a metal-oxide-semiconductor (MOS) transistor; and

forming a Micro-Electro-Mechanical Systems (MEMS) device over the MOS transistor, wherein the MEMS device comprising a bottom electrode in a second topmost metal layer, a diaphragm in a pad metal layer, and a cavity between the bottom electrode and the diaphragm, wherein the bottom electrode is a continuous planar structure;

forming a first inter-metal dielectric (IMD) layer on the semiconductor substrate;

forming the second topmost metal layer in the first IMD layer;

forming a second IMD layer on the first IMD layer;

forming a topmost metal layer in the second IMD layer;

forming a dielectric layer covering the topmost metal layer and the second IMD layer; and

forming an opening in the dielectric layer, wherein the opening partially exposes a top surface of the topmost metal layer;

forming the pad metal layer on the dielectric layer and in the opening; and

forming a passivation layer on the pad metal layer;

forming a via opening penetrating through the passivation layer and partially exposing the top surface of the topmost metal layer; and

etching away the topmost metal layer through the via opening, thereby forming the cavity.

2. The method for fabricating a semiconductor device according to claim 1 , wherein the topmost metal layer is etched away through the via opening by using a wet etching method.

3. The method for fabricating a semiconductor device according to claim 1 further comprising:

forming a pad opening in the passivation layer above the pad metal layer;

forming an under-bump-metallurgy (UBM) layer in the pad opening;

forming a bump pad on the UBM layer; and

forming a bump on the bump pad.