IP Library Granted Patent US 9,530,646
Granted Patent B2
US 9,530,646 · App. 14/629,491 · Granted Dec 27, 2016

Method of forming a semiconductor structure

Inventors: Li-Wei Feng (Kaohsiung, TW); Shih-Hung Tsai (Tainan, TW); Chao-Hung Lin (Changhua County, TW); Hon-Huei Liu (Kaohsiung, TW); An-Chi Liu (Tainan, TW); Chih-Wei Wu (New Taipei, TW); Jyh-Shyang Jenq (Pingtung County, TW); Shih-Fang Hong (Tainan, TW); En-Chiuan Liou (Tainan, TW); Ssu-I Fu (Kaohsiung, TW); Yu-Hsiang Hung (Tainan, TW); Chih-Kai Hsu (Tainan, TW); Mei-Chen Chen (Tainan, TW); Chia-Hsun Tseng (Tainan, TW)
Assignee: UNITED MICROELECTRONICS CORP.
H01L21/0337H01L21/0338H01L21/3083H01L21/823431H01L22/12
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Quick Facts
Patent No.
US 9,530,646
App. No.
14/629,491
Granted
Dec 27, 2016
Kind
B2
Abstract

A method of forming a semiconductor structure includes following steps. First of all, a patterned hard mask layer having a plurality of mandrel patterns is provided. Next, a plurality of first mandrels is formed on a substrate through the patterned hard mask. Following these, at least one sidewall image transferring (SIT) process is performed. Finally, a plurality of fins is formed in the substrate, wherein each of the fins has a predetermined critical dimension (CD), and each of the mandrel patterns has a CD being 5-8 times greater than the predetermined CD.

Claims (42)

1. A method of forming a semiconductor structure, comprising:

providing a photoresist layer having a plurality of mandrel patterns;

forming a plurality of first mandrels on a substrate through the photoresist layer;

performing at least one sidewall image transferring (SIT) process;

forming a plurality of third mandrels on the substrate through the SIT process;

forming a masking layer on the third mandrels and the substrate;

removing the masking layer on at least a portion of the third mandrels; and

forming a plurality of fins in the substrate through the masking layer and the third mandrels, wherein each of the fins has a predetermined critical dimension, at least one of the fins has a different critical dimension from others and each of the mandrel patterns has a critical dimension being 5-8 times greater than the predetermined critical dimension.

2. The method of forming a semiconductor structure of claim 1 , further comprising:

transferring the mandrel patterns of the photoresist layer to a mask layer under the photoresist layer, and the mask layer having a critical dimension being 5-8 times greater than the predetermined critical dimension.

3. The method of forming a semiconductor structure of claim 1 , further comprising:

forming a plurality of first spacers on the substrate, the first spacers surrounding the first mandrels respectively;

removing the first mandrels from the substrate; and

forming the third mandrels through the first spacers.

4. The method of forming a semiconductor structure of claim 3 , further comprising:

checking a critical dimension of the first spacers.

5. The method of forming a semiconductor structure of claim 4 , further comprising:

trimming a width of the first spacers to adjust the critical dimension of the first spacers.

6. The method of forming a semiconductor structure of claim 5 , wherein the trimming of the first spacers is performed after the first mandrels are removed.

7. The method of forming a semiconductor structure of claim 5 , wherein the trimming of the first spacers is performed before the first mandrels are removed.

8. The method of forming a semiconductor structure of claim 4 , further comprises:

forming another masking layer on the first spacers to adjust the critical dimension of the first spacers.

9. The method of forming a semiconductor structure of claim 1 , further comprising:

forming a plurality of first spacers on the substrate, the first spacers surrounding the first mandrels respectively;

removing the first mandrels from the substrate;

forming a plurality of second mandrels through the first spacers;

forming a plurality of second spacers on the substrate, the second spacers surrounding the second mandrels respectively;

removing the second mandrels; and

forming the third mandrels in the substrate through the second spacers.

10. The method of forming a semiconductor structure of claim 9 , further comprising:

checking a critical dimension of the first spacers.

11. The method of forming a semiconductor structure of claim 9 , further comprising:

checking a critical dimension of the second spacers.

12. The method of forming a semiconductor structure of claim 11 , further comprising:

trimming a width of the second spacers to adjust the critical dimension of the second spacers.

13. The method of forming a semiconductor structure of claim 12 , wherein the trimming of the second spacers is performed after the second mandrels are removed.

14. The method of forming a semiconductor structure of claim 12 , wherein the trimming of the second spacers is performed before the second mandrels are removed.

15. The method of forming a semiconductor structure of claim 1 , further comprising:

forming at least one of the fins having a different pitch from others.

16. The method of forming a semiconductor structure of claim 15 , wherein the photoresist layer comprises at least one mandrel pattern having a different pitch from others.

17. The method of forming a semiconductor structure of claim 15 , wherein the photoresist layer comprises at least one mandrel pattern having a different critical dimension from others.

18. The method of forming a semiconductor structure of claim 17 , wherein the at least one mandrel pattern has a critical dimension being 10-20 times greater than the predetermined critical dimension.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 26, 2021
From: UNITED MICROELECTRONICS CORPORATION
To: MARLIN SEMICONDUCTOR LIMITED
Reel/Frame 056991/0292 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 24, 2015
From: FENG, LI-WEI; TSAI, SHIH-HUNG; LIN, CHAO-HUNG; LIU, HON-HUEI; LIU, AN-CHI; WU, CHIH-WEI; JENQ, JYH-SHYANG; HONG, SHIH-FANG; LIOU, EN-CHIUAN; FU, SSU-I; HUNG, YU-HSIANG; HSU, CHIH-KAI; CHEN, MEI-CHEN; TSENG, CHIA-HSUN
To: UNITED MICROELECTRONICS CORP.
Reel/Frame 035010/0611 →
Continuity (1)
Related Publication 20160247678A1 · Aug 25, 2016