Lateral diffused metal-oxide-semiconductor device
View Patent ↗The present invention provides a lateral diffused metal-oxide-semiconductor device including a first doped region, a second doped region, a third doped region, a gate structure, and a contact metal. The first doped region and the third doped region have a first conductive type, and the second doped region has a second conductive type. The second doped region, which has a racetrack-shaped layout, is disposed in the first doped region, and has a long axis. The third doped region is disposed in the second doped region. The gate structure is disposed on the first doped region and the second doped region at a side of the third doped region. The contact metal is disposed on the first doped region at a side of the second doped region extending out along the long axis, and is in contact with the first doped region.
1. A lateral diffused metal-oxide-semiconductor (LDMOS) device, comprising:
a substrate;
a first doped region, disposed in the substrate, and having a first conductive type;
a second doped region, disposed in the first doped region, and having a second conductive type, wherein the second doped region has a racetrack-shaped outline, the second doped region has a long axis and a short axis, and the second doped region has a straight portion, disposed at an end of the short axis;
a third doped region, disposed in the second doped region, and having the first conductive type;
a fourth doped region, disposed in the first doped region, and having the first conductive type, wherein the fourth doped region is disposed in the first doped region at a side of the second doped region extending out along the short axis, and a width of the fourth doped region in a direction parallel with the long axis is larger than or equal to a width of the straight portion in the direction parallel with the long axis;
a gate structure, disposed on the first doped region and the second doped region between the third doped region and the fourth doped region; and
a contact metal, disposed on the first doped region at a side of the second doped region extending out along the long axis, and being in contact with the first doped region.
2. The LDMOS device according to claim 1 , wherein the third doped region is electrically connected to a low voltage end, and the fourth doped region is electrically connected to a high voltage end.
3. The LDMOS device according to claim 1 , further comprising a fifth doped region, disposed in the first doped region under the contact metal, and being in contact with the contact metal, wherein the fifth doped region has the second conductive type.
4. The LDMOS device according to claim 1 , wherein the contact metal has at least one extension part, extending out toward a side of the second doped region extending out along the short axis.
5. The LDMOS device according to claim 1 , further comprising a plurality of sixth doped regions, disposed in the third doped region, and penetrating through the third doped region to be in contact with the second doped region, wherein the sixth doped regions have the second conductive type.
6. The LDMOS device according to claim 1 , further comprising a guard ring, disposed in the substrate, and surrounding the first doped region.
7. The LDMOS device according to claim 1 , further comprising another contact metal, disposed on the first doped region at another side of the second doped region extending out along the long axis, and being in contact with the first doped region.
8. The LDMOS device according to claim 1 , wherein the gate structure surrounds the third doped region.
9. A lateral diffused metal-oxide-semiconductor (LDMOS) device, comprising:
two Schottky diodes, disposed in parallel with a direction, wherein each Schottky diode comprises a slit-shaped contact metal, and each slit-shaped contact metal extends along the direction; and
a plurality of LDMOS units, disposed between the Schottky diodes, and the LDMOS units being arranged along the direction.
10. The LDMOS device according to claim 9 , further comprising a guard ring, surrounding the Schottky diodes and the LDMOS units.
11. The LDMOS device according to claim 9 , further comprising a plurality of doped regions, each doped region and each LDMOS unit arranged sequentially in turn along the direction.