Semiconductor device and method for fabricating the same
View Patent ↗A method for fabricating semiconductor device includes the steps of: forming a fin-shaped structure on a substrate; forming a shallow trench isolation (STI) around the fin-shaped structure; forming a gate layer on the fin-shaped structure and the STI; removing part of the gate layer, part of the fin-shaped structure, and part of the STI to form a trench; and forming a dielectric layer into the trench to form a single diffusion break (SDB) structure.
1. A method for fabricating semiconductor device, comprising:
forming a fin-shaped structure on a substrate;
forming a shallow trench isolation (STI) around the fin-shaped structure;
forming a gate layer on the fin-shaped structure and the STI;
removing part of the gate layer, part of the fin-shaped structure, and part of the STI to form a trench;
forming a dielectric layer into the trench to form a single diffusion break (SDB) structure; and
after forming the SDB structure forming an interlayer dielectric (ILD) layer on the SDB structure.
2. The method of claim 1 , further comprising forming a gate dielectric layer on the fin-shaped structure before forming the gate layer.
3. The method of claim 2 , further comprising:
forming a patterned mask on the gate layer; and
using the patterned mask as mask to remove part of the gate layer, part of the gate dielectric layer, and part of the fin-shaped structure to form the trench.
4. The method of claim 1 , further comprising:
forming the dielectric layer into the trench and on the gate layer; and
planarizing the dielectric layer so that the top surfaces of the dielectric layer and the gate layer are coplanar.
5. The method of claim 1 , further comprising removing part of the gate layer after forming the SDB structure to form a gate structure adjacent to the SDB structure.
6. The method of claim 5 , further comprising:
forming a cap layer on the gate structure and the SDB structure; and
removing part of the cap layer to form a first spacer adjacent to the gate structure and a second spacer adjacent to the SDB structure.
7. The method of claim 1 , wherein the fin-shaped structure is disposed extending along a first direction and the SDB structure is disposed extending along a second direction.
8. The method of claim 7 , wherein the first direction is orthogonal to the second direction.
9. The method of claim 1 , wherein the gate layer comprises amorphous silicon.
10. The method of claim 1 , wherein the gate layer comprises polysilicon.
11. The method of claim 1 , wherein the dielectric layer comprises silicon nitride.
12. The method of claim 1 , wherein the dielectric layer comprises silicon oxide.