Method for fabricating semiconductor device
View Patent ↗A method for fabricating a semiconductor device is provided. A fin of a first conductivity type is formed on a substrate of the first conductivity type. A gate is formed on the substrate, wherein the gate covers a portion of the fin. Source and drain regions of a second conductivity type are formed in the fin at respective sides of the gate. A punch-through stopper (PTS) of the first conductivity type is formed in the fin underlying the gate and between the source and drain regions, wherein the PTS has an impurity concentration higher than that of the substrate. A first impurity of the second conductivity type is implanted into the PTS, so as to compensate the impurity concentration of the PTS.
1. A method for fabricating a semiconductor device, comprising:
forming a fin of a first conductivity type on a substrate of the first conductivity type;
forming a gate on the substrate, wherein the gate covers a portion of the fin;
forming source and drain regions of a second conductivity type in the fin at respective sides of the gate;
forming a punch-through stopper (PTS) of the first conductivity type in the fin underlying the gate and between the source and drain regions, wherein the PTS has an impurity concentration higher than an impurity concentration of the substrate; and
implanting a first impurity of the second conductivity type into the PTS, so as to compensate the impurity concentration of the PTS.
2. The method according to claim 1 , wherein further comprising implanting a second impurity of the first conductivity type into a bottom part of the source and drain regions, so as to compensate an impurity concentration of the bottom part of the source and drain regions.
3. The method according to claim 1 , wherein when the first conductivity type is P-type, the second conductivity is N-type; when the first conductivity type is N-type, the second conductivity is P-type.
4. A method for fabricating a semiconductor device, comprising:
forming a fin of a first conductivity type on a substrate of the first conductivity type;
forming a gate on the substrate, wherein the gate covers a portion of the fin;
forming source and drain regions of a second conductivity type in the fin at respective sides of the gate; and
implanting an impurity of the first conductivity type into a bottom part of the source and drain regions, so as to compensate an impurity concentration of the bottom part of the source and drain regions.
5. The method according to claim 4 , wherein a punch-through stopper (PTS) is not formed in the fin underlying the gate and between the source and drain regions.
6. The method according to claim 4 , wherein when the first conductivity type is P-type, the second conductivity is N-type; when the first conductivity type is N-type, the second conductivity is P-type.